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Best Computer Processor of All Time

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    1

    DEC T-11

    • Manufacturers: Digital Equipment Corporation
    • Processor Family: PDP-11 architecture
    The T-11, also known as DC310, is a microprocessor that implements the PDP-11 instruction set architecture (ISA) developed by Digital Equipment Corporation. The T-11 was code-named "Tiny". It was developed for embedded systems and was the first single-chip microprocessor developed by DEC. It was sold openly and was used by DEC in disk controllers, auxiliary processors and in the Atari System 2 arcade game system. It operated at 2.5 MHz, used a 5 V power supply and dissipated less than 1.2 W. It contains 13,000 transistors, uses NMOS logic, and was fabricated in a NMOS process.
    8.29
    7 votes
    2
    Clipper architecture

    Clipper architecture

    • Manufacturers: Fairchild Semiconductor International, Inc.
    • Used In Computers: Intergraph
    The Clipper architecture is a 32-bit RISC-like instruction set architecture designed by Fairchild Semiconductor. The architecture never enjoyed much market success, and the only computer manufacturers to create major product lines using Clipper processors were Intergraph and High Level Hardware. The first processors using the Clipper architecture were designed and sold by Fairchild, but the division responsible for them was subsequently sold to Intergraph in 1987; Intergraph continued work on Clipper processors for use in its own systems. The Clipper architecture used a simplified instruction set compared to earlier CISC architectures, but it did incorporate some more complicated instructions than were present in other contemporary RISC processors. These instructions were implemented in a so-called Macro Instruction ROM within the Clipper CPU. This scheme allowed the Clipper to have somewhat higher code density than other RISC CPUs. The initial Clipper microprocessor produced by Fairchild was the C100, which became available in 1986. This was followed by the faster C300 from Intergraph in 1988. The final model of the Clipper was the C400, released in 1990, which was extensively
    7.25
    8 votes
    3

    AMD K6-2

    • Manufacturers: Advanced Micro Devices
    • Processor Family: AMD K6
    The K6-2 was an x86 microprocessor introduced by AMD on May 28, 1998, and available in speeds ranging from 266 to 550 MHz. An enhancement of the original K6, the K6-2 introduced AMD's 3D-Now! SIMD instruction set, featured a larger 64 KiB Level 1 cache (32 KiB instruction and 32 KiB data), and an upgraded system-bus interface called Super Socket 7, which was backward compatible with older Socket 7 motherboards. It was manufactured using a 0.25 micrometre process, ran at 2.2 volts, and had 9.3 million transistors. The K6-2 was designed as a competitor to Intel's flagship processor, the significantly more expensive Pentium II. Performance of the two chips was similar: the previous K6-2 tended to be faster for general-purpose computing, while the Intel part was faster in x87 floating-point applications. To battle the Pentium 2's dominance on floating point calculations the K6-2 was the first CPU to introduce a floating point SIMD instruction set (dubbed 3DNow! by AMD), which significantly boosted performance. However programs needed to be specifically tailored for the new instructions and despite beating Intel's SSE instruction set to market, 3DNow achieved only limited
    6.88
    8 votes
    4
    AMD Fusion

    AMD Fusion

    AMD Fusion is the marketing name for a series of APUs by AMD, aimed at providing good performance with low power consumption, and integrating a CPU and a GPU based on a mobile stand-alone GPU. There has subsequently been a disagreement between Arctic (formerly Arctic Cooling) and AMD over the use of the "Fusion" brand name. AMD has thus changed Fusion to Heterogeneous Systems Architecture (HSA). Fusion was announced in 2006 and has been in development since then. The final design is the product of the merger between AMD and ATI, combining general processor execution as well as 3D geometry processing and other functions of modern GPUs (like GPGPU computation) into a single die. This technology was shown to the general public in January 2011 at CES. Second-generation "Trinity" parts are expected in June 2012. The 2011 platform integrates CPU, GPU, Northbridge, PCIe, DDR3 memory controller, and UVD on the same integrated circuit. The CPU and GPU are coupled together using a memory controller that arbitrates between coherent and non-coherent memory request. The physical memory is partitioned: up to 512 MB + virtual for GPU, remainder + virtual for the CPU. The 2012 platform will allow
    8.00
    6 votes
    5
    MOS Technology 6502

    MOS Technology 6502

    • Manufacturers: Synertek
    • Used In Computers: Apple II
    The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle and Bill Mensch for MOS Technology in 1975. When it was introduced, it was the least expensive full-featured microprocessor on the market by a considerable margin, costing less than one-sixth the price of competing designs from larger companies such as Motorola and Intel. It was nevertheless fully comparable with them and, along with the Zilog Z80, sparked a series of computer projects that would eventually result in the home computer revolution of the 1980s. The 6502 design was originally second-sourced by Rockwell and Synertek and later licensed to a number of companies. Soon after the 6502's introduction, MOS Technology was bought outright by Commodore International, who continued to sell the chip to other manufacturers. The 6502 was designed by many of the same engineers that had designed the Motorola 6800 microprocessor family. Motorola started the microprocessor project in 1971 with Tom Bennett as the main architect. The chip layout began in late 1972, the first 6800 chips were fabricated in February 1974 and full family was officially released in November 1974. Bill Mensch joined Motorola in
    6.86
    7 votes
    6
    7.67
    6 votes
    7
    Intel Core 2

    Intel Core 2

    • Manufacturers: Intel Corporation
    • Processor Family: x86-64
    • Used In Computers: iMac
    Core 2 is a brand encompassing a range of Intel's consumer 64-bit x86-64 single-, dual-, and quad-core microprocessors based on the Core microarchitecture. The single- and dual-core models are single-die, whereas the quad-core models comprise two dies, each containing two cores, packaged in a multi-chip module. The introduction of Core 2 relegated the Pentium brand to the mid-range market, and reunified laptop and desktop CPU lines, which previously had been divided into the Pentium 4, Pentium D, and Pentium M brands. The Core 2 brand was introduced on 27 July 2006, comprising the Solo (single-core), Duo (dual-core), Quad (quad-core), and in 2007, the Extreme (dual- or quad-core CPUs for enthusiasts) subbrands. Intel Core 2 processors with vPro technology (designed for businesses) include the dual-core and quad-core branches. The Core 2-branded CPUs include: "Conroe"/"Allendale" (dual-core for desktops), "Merom" (dual-core for laptops), "Merom-L" (single-core for laptops), "Kentsfield" (quad-core for desktops), and the updated variants named "Wolfdale" (dual-core for desktops), "Penryn" (dual-core for laptops), and "Yorkfield" (quad-core for desktops). (Note: For the server and
    7.67
    6 votes
    8

    Motorola 68EC030

    • Processor Family: 68k
    The 68EC030 is a microprocessor from Motorola. It is a lower cost version of the Motorola 68030, the difference between the two being that the 68EC030 does not have an on-chip memory management unit. The 68EC030 was used as the CPU of one model of the Amiga 4000, and on a number of CPU accelerator cards for the Commodore Amiga line of computers. Cisco Systems' 2500 Series Router, a small-to-medium enterprise computer internetworking appliance, also uses this CPU.
    7.67
    6 votes
    9

    AMD K6-III

    • Manufacturers: Advanced Micro Devices
    • Processor Family: AMD K6
    The K6-III, code-named "Sharptooth", was an x86 microprocessor manufactured by AMD, released on 22 February 1999, with 400 and 450 MHz models. It was the last Socket 7 desktop processor. For an extremely short time after its release, the fastest available desktop processor from Intel was the Pentium II 450 MHz. However, the K6-III also competed against the Pentium III "Katmai" line, released just days later on February 26. "Katmai" CPUs reached speeds of 500 MHz, slightly faster than the K6-III 450 MHz. K6-III performance was significantly improved over the K6-2 due to the addition of an on-die L2 cache running at full clock speed. When equipped with a 1MB L3 cache (on the motherboard) the 400 and 450 MHz K6-IIIs is claimed by Ars Technica to often outperform the hugely higher-priced Pentium III "Katmai" 450- and 500-MHz models, respectively. In conception, the design is simple: it was a K6-2 with on-die L2 cache. In execution, however, the design was not simple; with 21.4 million transistors. The pipeline was short compared to that of the Pentium III and thus the design did not scale well past 500 MHz. Nevertheless, the K6-III 400 sold well, and the AMD K6-III 450 was clearly the
    7.50
    6 votes
    10

    IXP1200

    The IXP1200 is a network processor fabricated by Intel Corporation. The processor was originally a Digital Equipment Corporation (DEC) project that had been in development since late 1996. When parts of DEC's Digital Semiconductor business was acquired by Intel in 1998 as part of an out-of-court settlement to end lawsuits each company had launched at each other for patent infringement, the processor was transferred to Intel. The DEC design team was retained and the design was completed by them under Intel. Samples of the processor were available for Intel partners since 1999, with general sample availability in late 1999. The processor was introduced in early 2000 at 166 and 200 MHz. A 232 MHz version was introduced later. The processor was later succeeded by the IXP2000, an XScale-based family developed entirely by Intel. The processor was intended to replace the general-purpose embedded microprocessors and specialized application-specific integrated circuit (ASIC) combinations used in network routers.The IXP1200 was designed for mid-range and high-end routers. For high-end models, the processor could be combined with others to increase the capability and performance of the
    7.50
    6 votes
    11
    7.50
    6 votes
    12

    Motorola 96000

    The Motorola 96XXX (aka 96000, 96K) is a family of digital signal processor (DSP) chips produced by Motorola. They are based on the earlier Motorola 56000 and remain software compatible with them, but have been updated to a full single-precision (32-bit) floating point implementation. Many of the design features of the 96000 remain similar to the 56000. Where the 56K grouped two 24-bit data and one 8-bit extension register into a single 56-bit accumulator, the 96K groups three 32-bit registers into a 96-bit accumulator. Unlike the 56K, the 96000 "family" consisted of a single model, the 96002. It was nowhere near as successful as the 56K, and was only produced for a short period of time. Today its role is filled by products based on the StarCore.
    7.17
    6 votes
    13
    Xeon

    Xeon

    • Manufacturers: Intel Corporation
    • Used In Computers: ProLiant
    The Xeon ( /ˈziːɒn/) is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer workstation, server, and embedded system markets. The Xeon brand has been maintained over several generations of x86 and x86-64 processors. Older models added the Xeon moniker to the end of the name of their corresponding desktop processor, but more recent models used the name Xeon on its own. The Xeon CPUs generally have more cache than their desktop counterparts in addition to multiprocessing capabilities. The first Xeon-branded processor was the Pentium II Xeon (code-named "Drake"). It was released in 1998, replacing the Pentium Pro in Intel's server lineup. The Pentium II Xeon was a "Deschutes" Pentium II (and shared the same product code: 80523) with a full-speed 512 KB, 1 MB, or 2 MB L2 cache. The L2 cache was implemented with custom 512 KB SRAMs developed by Intel. The number of SRAMs depended on the amount of cache. A 512 KB configuration required one SRAM, a 1 MB configuration: two SRAMs, and a 2 MB configuration: four SRAMs on both sides of the PCB. Each SRAM was a 12.90 mm by 17.23 mm (222.21 mm²) die fabricated in a 0.35 µm
    7.17
    6 votes
    14
    7.00
    6 votes
    15
    7.00
    6 votes
    16
    AMD K5

    AMD K5

    • Manufacturers: Advanced Micro Devices
    The K5 was AMD's first x86 processor to be developed entirely in-house. Introduced in March 1996, its primary competition was Intel's Pentium microprocessor. The K5 was an ambitious design, closer to a Pentium Pro than a Pentium regarding technical solutions and internal architecture. However, the final product was closer to the Pentium regarding performance, although faster clock for clock compared to the Pentium. The K5 was based upon an internal highly parallel 29k RISC processor architecture with an x86 decoding front-end. The K5 offered good x86 compatibility. All models had 4.3 million transistors, with five integer units that could process instructions out of order and one floating point unit. The branch target buffer was four times the size of the Pentium's and register renaming improved parallel performance of the pipelines. The chip's speculative execution of instructions reduced pipeline stalls. It had a 16 KB, four-way set associative instruction cache and an 8 KB data cache. The K5 lacked MMX instructions, which Intel started offering in its Pentium MMX processors that were launched in early 1997. The K5 project represented an early chance for AMD to take technical
    9.25
    4 votes
    17

    Intel 8061

    The Intel 8061 microcontroller is most notable for its use in the Ford EEC-IV automotive engine control unit. A close relative of the 8096, the Intel 8061 is second-sourced by Toshiba (under the model number 6127 and 6126) and Motorola (now Freescale Semiconductor). Introduction The MCS-96 family originated as a commercial derivative of the Intel 8061, the first processor in the Ford EEC-IV engine controller family. Differences between the 8061 and the 8096 include the memory interface bus, the 8061's M-Bus being a 'burst-mode' bus requiring a tracking program counter in the memory devices. There were also considerable differences in the I/O peripherals of the two parts - the 8061 had 8 HSI (pulse-measurement) inputs, 10 HSO (pulse-generation) outputs entirely separated from the HSI pins, and a non-sampling 10-bit ADC with more channels than the 8096 had. Many differences between the EEC-IV and the 8096 resulted from an effort to share pins to reduce I/O pin count in favor of using the pins for a more conventional memory interface bus. The 8061 and its derivatives were used in almost all Ford automobiles built from 1983 through the end of the 20'th century. This processor
    8.00
    5 votes
    18
    Motorola 68030

    Motorola 68030

    • Processor Family: 68k
    • Used In Computers: Macintosh LC III
    The Motorola 68030 is a 32-bit microprocessor in Motorola's 68000 family. It was released in 1987. The 68030 was the successor to the Motorola 68020, and was followed by the Motorola 68040. In keeping with general Motorola naming, this CPU is often referred to as the 030 (pronounced oh-three-oh or oh-thirty). The 68030 features on-chip instruction and data caches of 256 bytes each. It also has an on-chip MMU (memory management unit) but does not have a built in FPU (floating point unit). The 68881 and the faster 68882 floating point unit chips could be used with the 68030. A lower cost version of the 68030, the Motorola 68EC030, was also released, lacking the on-chip MMU. It was commonly available in both 132 pin QFP and 128 pin PGA packages. The poorer thermal characteristics of the QFP package limited the full 68030 QFP variant to 33 MHz. The PGA 68030s included 40 MHz and 50 MHz versions. There was also a small supply of QFP packaged EC variants. As a microarchitecture, the 68030 is basically a 68020 core with an additional data cache and a process shrink. Motorola used the process shrink to pack more hardware on the die; in this case it was the MMU, which was 68851 compatible.
    7.60
    5 votes
    19

    Motorola MC14500B

    The Motorola MC14500B Industrial Control Unit (ICU) is a CMOS one-bit microprocessor designed for simple control applications. It is well-suited to the implementation of ladder logic, and thus could be used to replace relay systems and programmable logic controllers. The MC14500B unit does not include program counter, therefore the size of supported memory is dependent on the implementation of program counter. The ICU architecture is similar to that of the DEC PDP-14 computer.
    7.60
    5 votes
    20

    Reduced instruction set computer

    Reduced instruction set computing, or RISC ( /ˈrɪsk/), is a CPU design strategy based on the insight that simplified (as opposed to complex) instructions can provide higher performance if this simplicity enables much faster execution of each instruction. A computer based on this strategy is a reduced instruction set computer also called RISC. Various suggestions have been made regarding a precise definition of RISC, but the general concept is that of a system that uses a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. RISC systems use the load/store architecture. The opposing architecture is known as complex instruction set computing, i.e. CISC. A number of systems, going back to the 1970s (and even 1960s) have been credited as the first RISC architecture, partly based on their use of load/store approach. The term RISC was coined by David Patterson of the Berkeley RISC project, although somewhat similar concepts had appeared before. Well known RISC families include DEC Alpha, AMD 29k, ARC, ARM, Atmel AVR, Blackfin, MIPS, PA-RISC, Power (including PowerPC), SuperH, and SPARC. In the 21st
    8.75
    4 votes
    21
    SPARC

    SPARC

    • Manufacturers: Sun Microsystems
    • Used In Computers: CM-5
    SPARC (from Scalable Processor Architecture) is a RISC instruction set architecture (ISA) developed by Sun Microsystems and introduced in mid-1987. SPARC is a registered trademark of SPARC International, Inc., an organization established in 1989 to promote the SPARC architecture, manage SPARC trademarks, and provide conformance testing. Implementations of the original 32-bit SPARC architecture were initially designed and used in Sun's Sun-4 workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 family of processors. Later, SPARC processors were used in SMP and CC-NUMA servers produced by Sun Microsystems, Solbourne and Fujitsu, among others, and designed for 64-bit operation. SPARC International was intended to open the SPARC architecture to make a larger ecosystem for the design, which has been licensed to several manufacturers, including Texas Instruments, Atmel, Cypress Semiconductor, and Fujitsu. As a result of SPARC International, the SPARC architecture is fully open and non-proprietary. In March 2006 the complete design of Sun Microsystems' UltraSPARC T1 microprocessor was released in open-source form at OpenSPARC.net and named the
    6.50
    6 votes
    22
    Athlon 64

    Athlon 64

    • Manufacturers: Advanced Micro Devices
    The Athlon 64 is an eighth-generation, AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP. The second processor (after the Opteron) to implement AMD64 architecture and the first 64-bit processor targeted at the average consumer, it was AMD's primary consumer microprocessor, and competes primarily with Intel's Pentium 4, especially the "Prescott" and "Cedar Mill" core revisions. It is AMD's first K8, eighth-generation processor core for desktop and mobile computers. Despite being natively 64-bit, the AMD64 architecture is backward-compatible with 32-bit x86 instructions. Athlon 64s have been produced for Socket 754, Socket 939, Socket 940 and Socket AM2. The line was succeeded by the dual-core Athlon 64 X2 and Athlon X2 lines. The Athlon 64 was originally codenamed ClawHammer by AMD, and was referred to as such internally and in press releases. The first Athlon 64 FX was based on the first Opteron core, SledgeHammer. Both cores, produced on a 130 nanometer process, were first introduced on September 23, 2003. The models first available were the FX-51,
    7.40
    5 votes
    23
    Intel 80376

    Intel 80376

    The Intel 80376, introduced January 16, 1989, was a variant of the Intel 80386SX intended for embedded systems. It differed from the 80386 in not supporting real mode (the processor booted directly into protected mode) and having no support for paging in the MMU. The 376 was available at 16 or 20 MHz. It was replaced with the much more successful 80386EX from 1994, and was finally discontinued on June 15, 2001. This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.
    7.40
    5 votes
    24
    Intel 8080

    Intel 8080

    • Manufacturers: Intel Corporation
    The Intel 8080 was the second 8-bit microprocessor designed and manufactured by Intel and was released in April 1974. It was an extended and enhanced variant of the earlier 8008 design, although without binary compatibility. The initial specified clock frequency limit was 2 MHz and with common instructions having execution times of 4, 5, 7, 10 or 11 cycles this meant a few hundred thousand instructions per second. The 8080 has sometimes been labeled "the first truly usable microprocessor", although earlier microprocessors were used for calculators and other applications. The architecture of the 8080 strongly influenced Intel's 8086 CPU architecture, which spawned the x86 family of processors. The 8080 was implemented using non-saturated enhancement-load NMOS, demanding an extra +12 volt and a −5 volt supply. The Intel 8080 was the successor to the 8008. It used the same basic instruction set as the 8008 (developed by Computer Terminal Corporation) and was source code compatible with its predecessor, but added some handy 16-bit operations to the instruction set as well. The 8080's large 40-pin DIP packaging permitted it to provide a 16-bit address bus and an 8-bit data bus, allowing
    7.40
    5 votes
    25

    Apple A4

    • Manufacturers: Apple Inc.
    • Processor Family: ARM Cortex-A8
    • Used In Computers: iPad
    The Apple A4 is a package on package (PoP) system-on-a-chip (SoC) designed by Apple Inc. and manufactured by Samsung. It combines an ARM Cortex-A8 CPU with a PowerVR GPU, and emphasizes power efficiency. The chip commercially debuted with the release of Apple's iPad tablet; followed shortly by the iPhone 4 smartphone, the iPod Touch (4th generation), and the Apple TV (2nd generation). It was superseded in the iPad 2 by the Apple A5 processor, released the following year, which was then subsequently replaced by the Apple A5X processor in the iPad (3rd generation). The part model number is: S5L8930X Apple A4 is based on the ARM processor architecture. The first version released runs at 1 GHz for the iPad and contains an ARM Cortex-A8 CPU core paired with a PowerVR SGX 535 graphics processor (GPU) built on Samsung's 45-nanometer (nm) silicon chip fabrication process. The clock speed for the units used in the iPhone 4 and iPod Touch (4th generation) is 800MHz, but the clock speed for the unit used in the Apple TV has not been revealed. The Cortex-A8 core used in the A4 is thought to use performance enhancements developed by chip designer Intrinsity (which was subsequently acquired by
    8.50
    4 votes
    26

    Nomadik

    Nomadik was a microprocessor for multimedia applications from ST-Ericsson. It was based on ARM architecture. The Nomadik application processors were designed specifically for mobile devices. It was aimed at 2.5G/3G mobile phones, personal digital assistants and other portable wireless products with multimedia capability. In addition it was suitable for automotive multimedia applications. The most known device using the Nomadik processor was the Nokia N96 which used the STn8815 version of the chipset. When the N96 debuted in 2008, the absence of a GPU was noticed. The Nomadik family has been discontinued. It was superseded by the NovaThor family.
    8.50
    4 votes
    27
    Philips 68070

    Philips 68070

    The SCC68070 was a Philips Semiconductors-branded Motorola 68000-based Microcontroller with built-in DMA controller, minimal MMU, I²C bus controller and other enhancements. Not all the differences were enhancements: it did not feature a dedicated address generation unit, so that, for example, operations involving an operand in memory requiring address calculation took longer on the 68070 than the 68000, since the same ALU had to do first the effective address calculation and then the operation. Despite the name, this chip was not part of the Motorola 680x0 series. It was often used in multimedia systems in conjunction with the VSC (Video- and Systems Controller) SCC66470, e.g. in the CD-i.
    8.50
    4 votes
    28

    PC532

    The PC532 was a "home-brew" microcomputer design created by George Scolaro and Dave Rand in 1989-90, based around the National Semiconductor NS32532 microprocessor (a member of the NS320xx series). Full hardware documentation for the design, including schematics and PAL programming data, was made freely available, and a short run (around 200) of motherboard PCBs were produced for hobbyists to populate and assemble into fully functional systems. The following operating systems were ported to the PC532:
    9.67
    3 votes
    29
    SuperH

    SuperH

    • Manufacturers: Hitachi, Ltd.
    SuperH (or SH) is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Hitachi. It is implemented by microcontrollers and microprocessors for embedded systems. The SH-3 and SH-4 architectures support both big-endian and little-endian byte ordering (they are bi-endian). The SuperH processor core family was first developed by Hitachi in the early 1990s. Hitachi has developed a complete group of upward compatible instruction set CPU cores. The SH-1 and the SH-2 were used in the Sega Saturn and Sega 32X. These cores have 16-bit instructions for better code density than 32-bit instructions, a benefit at the time as memory was very expensive. A few years later the SH-3 core was added to the SH CPU family; new features included another interrupt concept, a memory management unit (MMU) and a modified cache concept. The SH-3 core also got a DSP extension, then called SH-3-DSP. With extended data paths for efficient DSP processing, special accumulators and a dedicated MAC-type DSP engine, this core was unifying the DSP and the RISC processor world. A derivative was also used with the original SH-2 core. For the Dreamcast, Hitachi developed the SH-4
    9.67
    3 votes
    30
    Pentium

    Pentium

    • Manufacturers: Intel Corporation
    • Processor Family: x86-32 (32 bit Intel x86)
    The original Pentium microprocessor was introduced on March 22, 1993. Its microarchitecture, deemed P5, was Intel's fifth-generation and first superscalar x86 microarchitecture. As a direct extension of the 80486 architecture, it included dual integer pipelines, a faster FPU, wider data bus, separate code and data caches and features for further reduced address calculation latency. In 1996, the Pentium with MMX Technology (often simply referred to as Pentium MMX) was introduced with the same basic microarchitecture complemented with an MMX instruction set, larger caches, and some other enhancements. The P5 Pentium competitors included the Motorola 68060 and the PowerPC 601 as well as the SPARC, MIPS, and Alpha microprocessor families, most of which also used a superscalar in-order dual instruction pipeline configuration at some time. Intel's Larrabee multicore architecture project uses a processor core derived from a P5 core (P54C), augmented by multithreading, 64-bit instructions, and a 16-wide vector processing unit. Intel's low-powered Bonnell microarchitecture employed in Atom processor cores also uses an in-order dual pipeline similar to P5. The P5 microarchitecture was
    7.20
    5 votes
    31
    7.00
    5 votes
    32
    Motorola 88000

    Motorola 88000

    • Manufacturers: Motorola
    • Used In Computers: OMRON Luna-88K2
    The 88000 (m88k for short) is a RISC instruction set architecture (ISA) developed by Motorola. The 88000 was Motorola's attempt at a home-grown RISC architecture, started in the 1980s. The 88000 arrived on the market some two years after the competing SPARC and MIPS. Due to the late start and extensive delays releasing the second-generation MC88110, the m88k achieved very limited success outside of the MVME platform and embedded controller environments. Though sometimes referred to as A88k, the Apollo PRISM is not related to the Motorola 88000. Originally called the 78000 as a homage to their famed 68000 series, the design went through a tortured development path, including the name change, before finally emerging in April 1988. In the late 1980s several companies were actively watching the 88000 for future use, including NeXT, Apple Computer and Apollo Computer, but all gave up by the time the 88110 was available in 1990. There was an attempt to popularize the system with the 88open group, similar to what Sun Microsystems was attempting with their SPARC design. It appears to have failed in any practical sense. In the early 1990s Motorola joined the AIM effort to create a new RISC
    9.00
    3 votes
    33
    7.75
    4 votes
    34
    7.75
    4 votes
    35
    Intel Core i7

    Intel Core i7

    • Manufacturers: Intel Corporation
    • Used In Computers: MacBook Air
    Intel Core i7 is an Intel brand name for several families of desktop and laptop 64-bit x86-64 processors using the Nehalem, Westmere, and Sandy Bridge microarchitectures. The Core i7 brand is targeted at the business and high-end consumer markets for both desktop and laptop computers, and is distinguished from the Core i3 (entry-level consumer), Core i5 (mainstream consumer) and Xeon (server and workstation) brands. The Core i7 name was introduced with the Bloomfield Quad-core processor in late 2008. In 2009 new Core i7 models based on the Lynnfield desktop quad-core processor and the Clarksfield quad-core mobile were added , and models based on the Arrandale dual-core mobile processor were added in January 2010. The first six-core processor in the Core lineup is the Gulftown, which was launched on March 16, 2010. Both the regular Core i7 and the Extreme Edition are advertised as five stars in the Intel Processor Rating. In January 2011, Intel released the second generation of core i7 processors. Both the first and second generation of Intel core i7 processors are rated as 5 stars in the Intel processor rating. The 2nd generation of Intel core processors are based on the 'Sandy
    7.75
    4 votes
    36
    Intel 80188

    Intel 80188

    The Intel 80188 is a version of the Intel 80186 microprocessor with an 8 bit external data bus, instead of 16 bit. This makes it less expensive to connect to peripherals. The 80188 is otherwise very similar to the 80186. It has a throughput of 1 million instructions per second. As the 8086, the 80188 featured four 16-bit general registers, which could also be accessed as eight 8-bit registers. It also included six more 16-bit registers, which included, for example, the stack pointer, the instruction pointer, index registers, or a status word register that acted like a flag, for example, in comparison operations. Just like the 8086, the processor also included four 16-bit segment registers that enabled the addressing of more than 64 KB of memory, which is the limit of a 16-bit architecture, by introducing an offset value that was added, after being shifted left 4 bits, to the value of another register. This addressing system provided a total of 1 MB of addressable memory, a value that, at the time, was considered to be very far away from the total memory a computer would ever need.
    6.60
    5 votes
    37
    7.50
    4 votes
    38
    PowerPC G3

    PowerPC G3

    • Used In Computers: iBook G3
    The PowerPC 7xx is a family of third generation 32-bit PowerPC microprocessors designed and manufactured by IBM and Motorola (now Freescale Semiconductor). This family is called the PowerPC G3 by its well-known customer Apple Inc, which introduced it on November 10, 1997. The term "PowerPC G3" is often, and incorrectly, imagined to be a microprocessor when in fact a number of microprocessors from different vendors have been used. Such designations were applied to Apple Macintosh computers such as the PowerBook G3, the multicolored iMacs, iBooks and several desktops, including both the Beige and Blue and White Power Macintosh G3s. The low power requirements and small size made the processors ideal for laptops and the name lived out its last days at Apple in the iBook. The 7xx family is also widely used in embedded devices like printers, routers, storage devices, spacecraft, and video game consoles. The 7xx family had its shortcomings, namely lack of SMP support and SIMD capabilities and a relatively weak FPU. Motorola's 74xx range of processors picked up where the 7xx left off. The PowerPC 740 and 750 (codename Arthur) were introduced in late 1997 as an evolutionary replacement for
    7.50
    4 votes
    39

    Freescale ColdFire

    • Processor Family: 68k
    The Freescale ColdFire is a microprocessor that derives from the Motorola 68000 family architecture, manufactured for embedded systems development by Freescale Semiconductor (formerly the semiconductor division of Motorola). The ColdFire instruction set is "assembly source" compatible (by means of translation software available from the vendor) and not entirely object code compatible with the 68000. When compared to classic 68k hardware, the instruction set differs mainly in that it no longer has support for the binary-coded decimal (BCD) packed data format; it removes a number of other, less used instructions; and most instructions that are kept support fewer addressing modes. Also, floating point intermediates are 64 bits and not 80 bits as in the 68881 and 68882 coprocessors. The instructions are only 16, 32, or 48 bits long, a simplification compared to the 68000 series. In 2006, Debian project was looking into making its m68k port compatible with the ColdFires, as there are ColdFire models that are much faster than the 68060. They can be clocked as high as 300  MHz, compared with 75  MHz for a 68060 (the fastest "real" m68k processor) without overclocking. Stallion
    8.67
    3 votes
    40
    Intel 80487

    Intel 80487

    The Intel's i487 is a floating point unit coprocessor for Intel i486SX machines. It was essentially a full-blown i486DX chip. When installed into an i486SX system, the i487 disabled the main CPU and took over all CPU operations. In theory the computer would be able to operate if the original i486SX CPU was removed, although in practice a pin on the i487 prevented this.
    8.67
    3 votes
    41

    Zilog eZ80

    • Manufacturers: Zilog
    • Processor Family: Zilog Z80
    • Used In Computers: IMSAI Series Two
    The Zilog eZ80 is an 8-bit microprocessor which is essentially an updated version of the company's earlier Z80 8-bit microprocessor. The eZ80 (like the Z380) is binary compatible with the Z80 and Z180, but almost four times as fast as the original Z80 chip at the same clock frequency. Available at up to 50 MHz (2004), the performance is comparable to a Z80 clocked at 200 MHz if fast memory is used (i.e. no wait states for opcode fetches, for data, or for I/O) or even higher in some applications (a 16-bit addition is 11 times as fast as in the original). The eZ80 also supports direct continuous addressing of 16 MB of memory without a memory management unit, by extending most registers (HL, BC, DE, IX, IY, SP, and PC) from 16 to 24 bits. The processor has a 24-bit ALU (Arithmetic Logic Unit) and overlapped processing of several instructions (a so called pipeline) which are the two primary reasons for its speed. Unlike the older Z280 and Z380 it does not have (or need) a cache memory. Instead, it is intended to work with fast SRAM directly as main memory (as this has become much cheaper). Nor does it have the multiplexed bus of the Z280, making it as easy to work with (interface to)
    8.67
    3 votes
    42
    Hitachi 6309

    Hitachi 6309

    • Manufacturers: Hitachi, Ltd.
    • Processor Family: Motorola 6809
    The 6309 is Hitachi's CMOS version of the Motorola 6809 microprocessor. While in "Emulation Mode" it is fully compatible with the 6809. To the 6809 specifications it adds higher clock rates, enhanced features, new instructions, and additional registers. Most new instructions were added to support the additional registers, as well as up to 32-bit math, hardware division, bit manipulations, and block transfers. The 6309 is generally 30% faster in native mode than the 6809. Surprisingly, this information was never published by Hitachi. The April 1988 issue of Oh! FM, a Japanese magazine for Fujitsu personal computer users, contained the first description of the 6309's additional capabilities. Later, Hirotsugu Kakugawa posted details of the 6309's new features and instructions to comp.sys.m6809. This led to the development of NitrOS9 for the Tandy Color Computer 3. The 6309 differs from the 6809 in several key areas. The 6309 is fabricated in CMOS technology, while the 6809 is an NMOS device. As a result, the 6309 requires less power to operate than the 6809. It is also a fully static device, which will not lose internal state information. This means it can be used with external DMA
    10.00
    2 votes
    43

    Celeron

    • Manufacturers: Intel Corporation
    • Processor Family: x86-64
    • Used In Computers: ASUS Eee PC 900
    Celeron is a brand name given by Intel Corp. to a number of different x86 computer microprocessor models targeted at budget personal computers. Celeron processors can run all IA-32 computer programs, but their performance is often significantly lower when compared to similar CPUs with higher-priced Intel CPU brands. For example, the Celeron brand will often have less cache memory, or have advanced features purposely disabled. These missing features can have a variable impact on performance, but is often very substantial. While a few of the Celeron designs have achieved surprising performance, most of the Celeron line has exhibited noticeably degraded performance. This has been the primary justification for the higher cost of other Intel CPU brands versus the Celeron range. Introduced in April 1998, the first Celeron branded CPU was based on the Pentium II branded core. Subsequent Celeron branded CPUs were based on the Pentium III, Pentium 4, Pentium M, and Intel Core branded processors. The latest Celeron design (as of July 2011) is based on the second generation Core i3/i5/i7 series (Sandy Bridge). This design features independent processing cores (CPUs), but with only 66% as much
    7.25
    4 votes
    44
    Intel 8087

    Intel 8087

    The Intel 8087, announced in 1980, was the first x87 floating-point coprocessor for the 8086 line of microprocessors. The purpose of the 8087 was to speed up computations for floating-point arithmetic, such as addition, subtraction, multiplication, division, and square root. It also computed transcendental functions such as exponential, logarithmic or trigonometric calculations. The performance enhancements were from approximately 20% to over 500%, depending on the specific application. The 8087 could perform about 50,000 FLOPS using around 2.4 watts. Only arithmetic operations benefited from installation of an 8087; computers used only with such applications as word processing, for example, would not benefit from the extra expense (around $150 ) and power consumption of an 8087. The sales of the 8087 received a significant boost when IBM included a coprocessor socket on the IBM PC motherboard. Development of the 8087 led to the IEEE 754-1985 standard for floating-point arithmetic. Later Intel processors (introduced after the 486DX) did not use a separate floating point coprocessor. Intel had previously manufactured the 8231 Arithmetic processing unit, and the 8232 Floating Point
    7.25
    4 votes
    45
    Motorola 68000

    Motorola 68000

    • Processor Family: 68k
    • Used In Computers: Amiga
    The Motorola 68000 is a 16/32-bit CISC microprocessor core designed and marketed by Freescale Semiconductor (formerly Motorola Semiconductor Products Sector). Introduced in 1979 with HMOS technology as the first member of the successful 32-bit m68k family of microprocessors, it is generally software forward compatible with the rest of the line despite being limited to a 16-bit wide external bus. After 30 years in production, the 68000 architecture is still in use. The 68000 grew out of the MACSS (Motorola Advanced Computer System on Silicon) project, begun in 1976 to develop an entirely new architecture without backward compatibility. It would be a higher-power sibling complementing the existing 8-bit 6800 line rather than a compatible successor. In the end, the 68000 did retain a bus protocol compatibility mode for existing 6800 peripheral devices, and a version with an 8-bit data bus was produced. However, the designers mainly focused on the future, or forward compatibility, which gave the M68K platform a head start against later 32-bit instruction set architectures. For instance, the CPU registers are 32 bits wide, though few self-contained structures in the processor itself
    7.25
    4 votes
    46
    Pentium II

    Pentium II

    • Processor Family: x86-32 (32 bit Intel x86)
    The Pentium II brand refers to Intel's sixth-generation microarchitecture ("P6") and x86-compatible microprocessors introduced on May 7, 1997. Containing 7.5 million transistors, the Pentium II featured an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5 million transistors. However, its L2 cache subsystem was a downgrade when compared to Pentium Pros. In early 1999, the Pentium II was superseded by the Pentium III. In 1998, Intel stratified the Pentium II family by releasing the Pentium II-based Celeron line of processors for low-end workstations and the Pentium II Xeon line for servers and high-end workstations. The Celeron was characterized by a reduced or omitted (in some cases present but disabled) on-die full-speed L2 cache and a 66 MT/s FSB. The Xeon was characterized by a range of full-speed L2 cache (from 512 KB to 2048 KB), a 100 MT/s FSB, a different physical interface (Slot 2), and support for symmetric multiprocessing. The Pentium II microprocessor was largely based upon the microarchitecture of its predecessor, the Pentium Pro, but with some significant improvements. Unlike previous Pentium and Pentium Pro processors, the
    7.25
    4 votes
    47

    Tukwila

    Tukwila is the code-name for the generation of Intel's Itanium processor family following Itanium 2 and Montecito. It was released on 8 February 2010 as the Itanium 9300 Series. While its features have not been publicly disclosed in detail, it utilizes both multiple processor cores (multi-core) and SMT techniques. The engineers said to be working on this project are from the Alpha project, specifically those who worked on the Alpha 21464 (EV8), which was focused on SMT. Named for the city of Tukwila, Washington, Tukwila was previously code-named Tanglewood. However the name coincides with the Tanglewood music festival, and Intel renamed the project in late 2003. The processor has two to four cores per die and up to 24 MB L3 of on-die cache. They are the first batch of processors to contain more than 2 billion transistors on a single die., which is added up from : Die size is 21.5×32.5 mm or 698.75 mm² It has been publicly disclosed that Tukwila and its associated chipset would bring socket compatibility between Intel's Xeon and Itanium processors, by introducing a new interconnect called Intel QuickPath Interconnect (QuickPath, previously known as Common System Interface or CSI).
    7.25
    4 votes
    48

    DEC PRISM

    • Manufacturers: Digital Equipment Corporation
    Prism was a 32-bit RISC instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). It was the final outcome of a number of DEC research projects from the 1982–1985 time-frame, and was at the point of delivering silicon in 1988 when the management canceled the project. The next year work on the Alpha started, based heavily on the Prism design. In the early 1980s DEC was a huge success, flush with cash and infused with a feeling of invincibility. Projects were started all over the company to chase the "next big thing", with little or no overall direction or managerial oversight. RISC computing was one of those next big things, and in the period from 1982 to 1985 no fewer than four attempts were made to create a RISC chip at different divisions. Titan from DEC's Western Research Laboratory (WRL) in Palo Alto, California was a high-performance ECL based design that started in 1982, intended to run Unix. SAFE (Streamlined Architecture for Fast Execution) was a 64-bit design that started the same year, designed by Alan Kotok (of Spacewar! fame) and Dave Orbits and intended to run VMS. HR-32 (Hudson, RISC, 32-bit) started in 1984 by Rich Witek and Dan Dobberpuhl
    8.33
    3 votes
    49
    Intel 80186

    Intel 80186

    The Intel 80186 is a microprocessor and microcontroller introduced in 1982. It was based on the Intel 8086 and, like it, had a 16-bit external data bus multiplexed with a 20-bit address bus. It was also available as the 80188, with an 8-bit external data bus. The 80186 series was generally intended for embedded systems, as microcontrollers with external memory. Therefore, to reduce the number of chips required, it included features such as clock generator, interrupt controller, timers, wait state generator, DMA channels, and external chip select lines. The initial clock rate of the 80186 was 6 MHz, but due to more hardware available for the microcode to use, especially for address calculation, many individual instructions ran faster than on an 8086 at the same clock frequency. For instance, the common register+immediate addressing mode was significantly faster than on the 8086, especially when a memory location was both (one of the) operand(s) and the destination. Multiply and divide also showed great improvement being several times as fast as on the original 8086 and multi-bit shifts were done almost four times as quickly as in the 8086. A few new instructions were introduced with
    8.33
    3 votes
    50
    Intel 8048

    Intel 8048

    The MCS-48 microcontroller (µC) series, Intel's first microcontroller, was originally released in 1976. Its first members were 8048, 8035 and 8748. Initially this family was produced using NMOS-technology, in the early 1980s it became available in CMOS-technology. The MCS-48 series has a Modified Harvard architecture, with internal or external program ROM and 64–256 bytes of internal (on-chip) RAM. The I/O is mapped into its own address space, separate from programs and data. The 8048 is probably the most prominent member of Intel's MCS-48 family of microcontrollers. It was inspired by, and is somewhat similar to, the Fairchild F8 microprocessor. Though the MCS-48 series was eventually replaced by the very popular Intel MCS-51, even at the turn of the millennium it remains quite popular, due to its low cost, wide availability, memory efficient one-byte instruction set, and mature development tools. Because of this it is much used in high-volume consumer electronics devices such as TV sets, TV remotes, toys, and other gadgets where cost-cutting is essential. The 8049 has 2 KB of masked ROM (the 8748 and 8749 had EPROM) that can be replaced with a 4 KB external ROM, as well as 128
    8.33
    3 votes
    51
    8.33
    3 votes
    52
    Atmel AVR

    Atmel AVR

    • Manufacturers: Atmel
    The AVR is a modified Harvard architecture 8-bit RISC single chip microcontroller which was developed by Atmel in 1996. The AVR was one of the first microcontroller families to use on-chip flash memory for program storage, as opposed to one-time programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time. The AVR architecture was conceived by two students at the Norwegian Institute of Technology (NTH) Alf-Egil Bogen and Vegard Wollan. The original AVR MCU was developed at a local ASIC house in Trondheim, Norway called Nordic VLSI at the time, now Nordic Semiconductor, where Bogen and Wollan were working as students. It was known as a μRISC (Micro RISC) and was available as silicon IP/building block from Nordic VLSI. When the technology was sold to Atmel from Nordic VLSI, the internal architecture was further developed by Bogen and Wollan at Atmel Norway, a subsidiary of Atmel. The designers worked closely with compiler writers at IAR Systems to ensure that the instruction set provided for more efficient compilation of high-level languages. Atmel says that the name AVR is not an acronym and does not stand for anything in particular. The creators of the AVR give no
    6.20
    5 votes
    53
    X86

    X86

    • Manufacturers: VIA Technologies
    • Used In Computers: IBM System x
    x86 is a series of computer microprocessor instruction set architectures based on the Intel 8086 CPU. The 8086 was introduced during 1978 as a fully 16-bit extension of Intel's 8-bit based 8080 microprocessor and also introduced memory segmentation to overcome the 16-bit addressing barrier of such designs. The term x86 derived from the fact that early successors to the 8086 also had names ending with "86". Many additions and extensions have been added to the x86 instruction set over the years, almost consistently with full backward compatibility. The architecture has been implemented in processors from Intel, Cyrix, Advanced Micro Devices, VIA, and many other companies. The term is not synonymous with IBM PC compatibility as this implies a multitude of other computer hardware; embedded systems as well as general-purpose computers used x86 chips before the PC-compatible market started, some of them before the IBM PC itself. As the term became common after the introduction of the 80386, it usually implies binary compatibility with the 32-bit instruction set of the 80386. This may sometimes be emphasized as x86-32 or x32 to distinguish it either from the original 16-bit "x86-16" or
    6.20
    5 votes
    54

    AMD K6

    • Manufacturers: Advanced Micro Devices
    The K6 microprocessor was launched by AMD in 1997. The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for Pentium branded CPUs. It was marketed as a product which could perform as well as its Intel Pentium II equivalent but at a significantly lower price. The K6 had a considerable impact on the PC market and presented Intel with serious competition. The AMD K6 is a superscalar P5 Pentium-class microprocessor, manufactured by AMD, which superseded the K5. The AMD K6 is based on the Nx686 microprocessor that NexGen was designing when it was acquired by AMD. Despite the name implying a design evolving from the K5, it is in fact a totally different design that was created by the NexGen team, including chief processor architect Greg Favor, and adapted after the AMD purchase. The K6 processor included a feedback dynamic instruction reordering mechanism, MMX instructions, and a floating-point unit (FPU). It was also made pin-compatible with Intel's Pentium, enabling it to be used in the widely available "Socket 7"-based motherboards. Like the AMD K5, Nx586, and Nx686 before it, the K6 translated x86 instructions on the fly
    9.50
    2 votes
    55
    AMD Turion

    AMD Turion

    AMD Turion is the brand name AMD applies to its 64-bit low-power consumption (mobile) processors codenamed K8L. The Turion 64 and Turion 64 X2/Ultra processors compete with Intel's mobile processors, initially the Pentium M and the Intel Core and Intel Core 2 processors. Earlier Turion 64 processors are compatible with AMD's Socket 754. The newer "Richmond" models are designed for AMD's Socket S1. They are equipped with 512 or 1024 KiB of L2 cache, a 64-bit single channel on-die DDR-400 memory controller, and an 800 MHz HyperTransport bus. Battery saving features, like PowerNow!, are central to the marketing and usefulness of these CPUs. Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete with Intel's Core and Core 2 CPUs. The Turion 64 X2 was launched on May 17, 2006, after several delays. These processors use Socket S1, and feature DDR2 memory. They also include AMD Virtualization Technology and more power-saving features. AMD first produced the Turion 64 X2 on IBM's 90 nm Silicon on insulator (SOI) process (cores with the Taylor codename). As of May 2007, they have switched to a 65 nm Silicon-Germanium stressed process, which was recently achieved through the
    9.50
    2 votes
    56
    Intel 80486 OverDrive

    Intel 80486 OverDrive

    The Intel's i486 OverDrive processors are a category of various Intel 80486s that were produced with the designated purpose of being used to upgrade personal computers. The OverDrives typically possessed qualities different from 'standard' i486s with the same speed steppings. Those included built-in voltage regulators, different pin-outs, write-back cache instead of write-through cache, built-in heatsinks, and fanless operation — features that made them more able to work where an ordinary edition of a particular model would not. Each 486 Overdrive typically came in 2 versions, ODP and ODPR variants. The ODPR chips had 168 pins and functioned as complete swap-out replacements for existing chips, whereas the ODP chips had an extra 169th pin, and were used for inserting into a special 'Overdrive' (Socket 1) socket on some 486 boards, which would disable the existing CPU without needing to remove it(in case that the existing CPU is surface mounted). ODP chips will not work in Pre-Socket 1 486 boards due to the extra pin. The ODP and ODPR labeling can be found in the CPU's model number(i.e.: DX2ODPR66). Models available included: 2 P54 core Pentium based CPUs were released for 238pin
    9.50
    2 votes
    57
    9.50
    2 votes
    58
    ARM architecture

    ARM architecture

    • Manufacturers: Samsung Electronics
    • Used In Computers: Mylo
    ARM (formerly Advanced RISC Machine and Acorn RISC Machine) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by British company ARM Holdings. The ARM architecture is the most widely used 32-bit instruction set architecture in numbers produced. Originally conceived by Acorn Computers for use in its personal computers, the first ARM-based products were the co-processor modules for the BBC Micro series of computers. In 2005 about 98% of the more than one billion mobile phones sold each year used at least one ARM processor. As of 2009 ARM processors accounted for approximately 90% of all embedded 32-bit RISC processors and were used extensively in consumer electronics, including personal digital assistants (PDAs), tablets, mobile phones, digital media and music players, hand-held game consoles, calculators and computer peripherals such as hard drives and routers. The ARM architecture is licensable. Companies that are current or former ARM licensees include Advanced Micro Devices, Inc., Alcatel-Lucent, Apple Inc., AppliedMicro, Atmel, Broadcom, Cirrus Logic, CSR plc, Digital Equipment Corporation, Ember, Energy Micro, Freescale, Fuzhou Rockchip,
    7.00
    4 votes
    59
    MOS Technology 8502

    MOS Technology 8502

    • Processor Family: MOS Technology 6510
    • Used In Computers: Commodore 128
    The MOS Technology 8502 was an 8-bit microprocessor designed by MOS Technology and used in the Commodore 128. Based on the MOS 6510 that was used in the Commodore 64, the 8502 added the ability to run at a double (2.048 MHz) clock rate, in addition to the standard 1.024 MHz rate used by the Commodore 64. Since the 40-column VIC-II display chip could not "steal" sufficient cycles when the CPU ran at double speed, video display in fast mode was available only with the 80-column VDC (unlike the VIC, which shares memory with the CPU, the VDC has its own dedicated video RAM in the C128). Some 40-column applications selectively disabled the screen when performing CPU-intensive calculations so that the additional speed could be utilized when the loss of video output was unimportant. A smaller speed gain, about 35%, was also possible while keeping the 40-column display active, by switching to 2MHz only while the VIC-II is drawing the vertical screen border, since no RAM access by the VIC is needed during that time. The pinout is a little bit different from the 6510. The 8502 has an extra I/O-pin (the built-in I/O port mapped to addresses 0 and 1 is extended from 6 to 7 bits) and lacks the
    7.00
    4 votes
    60

    Motorola 68012

    • Processor Family: 68k
    The Motorola MC68012 processor is a 16/32-bit microprocessor from the early 1980s. It is an 84-pin PGA version of the Motorola MC68010. The memory space was extended to 2GB and an RMC pin was added, in order to help the design of multiprocessor systems with virtual memory. All other features of the MC68010 were preserved. The expansion of the memory space caused an issue for any programs that used the high byte of an address to store data, a programming trick that was successful with those processors that only have a 24-bit address bus (68000 and 68010). A similar problem affected the 68020.
    7.00
    4 votes
    61

    68k

    • Used In Computers: Macintosh
    The Motorola 680x0/m68000/68000 is a family of 32-bit CISC microprocessors. During the 1980s and early 1990s, they were popular in personal computers and workstations and were the primary competitors of Intel's x86 microprocessors. They were most well known as the processors powering the early Apple Macintosh, the Commodore Amiga, the Sinclair QL, the Atari ST, Sega Mega Drive/Genesis and several others. Although no modern desktop computers are based on the 68000, derivative processors are still widely used in embedded applications. 68010 68020 68030: 68040: 68060: The 68000 line of processors has been used in a variety of systems, from modern high-end Texas Instruments calculators (the TI-89, TI-92, and Voyage 200 lines) to all of the members of the Palm Pilot series that run Palm OS 1.x to 4.x (OS 5.x is ARM-based), and even radiation hardened versions in the critical control systems of the Space Shuttle. However, they became most well known as the processors powering desktop computers such as the Apple Macintosh, the Commodore Amiga, the Sinclair QL, the Atari ST, and several others. The 68000 was also the processor of choice in the 1980s for Unix workstations and servers from
    6.00
    5 votes
    62
    AMD Am9080

    AMD Am9080

    Am9080 is a CPU manufactured by AMD. It was originally produced without license as a clone of the Intel 8080, reverse-engineered by Shawn and Kim Hailey by photographing an early Intel chip and developing a schematic and logic diagrams from the images. In initial production, the chips cost about 50 cents to make, yielding 100 chips per wafer, and were sold into the military market for $700 each. The first versions of the Am9080 became available in April 1974. This CPU operated at a speed of 2 MHz. Later, an agreement was made with Intel to become a licensed second-source for the 8080, enabling both manufacturers' chips to break into markets that would not accept a single-sourced part.
    8.00
    3 votes
    63
    Intel i960

    Intel i960

    Intel's i960 (or 80960) was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller, becoming a best-selling CPU in that field, along with the competing AMD 29000. In spite of its success, Intel dropped i960 marketing in the late 1990s as a side effect of a settlement with DEC in which Intel received the rights to produce the StrongARM CPU. The processor continues to be used in a few military applications. The i960 design was started as a response to the failure of Intel's iAPX 432 design of the early 1980s. The iAPX 432 was intended to directly support high-level languages that supported tagged, protected, garbage-collected memory — such as Ada and Lisp — in hardware. Because of its instruction-set complexity, its multi-chip implementation, and design flaws, the iAPX 432 was very slow in comparison to other processors of its time. In 1984 Intel and Siemens started a joint project, ultimately called BiiN, to create a high-end fault-tolerant object-oriented computer system programmed entirely in Ada. Many of the original i432 team members joined this project, though a new lead architect was brought in from IBM, Glenford Myers. The
    8.00
    3 votes
    64
    8.00
    3 votes
    65

    VAX

    VAX (Virtual Address eXtension) was an instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC) in the mid-1970s. A 32-bit complex instruction set computer (CISC) ISA, it was designed to extend or replace DEC's various Programmed Data Processor (PDP) ISAs. The VAX name was also used by DEC for a family of computer systems based on this processor architecture. The VAX architecture's primary features were virtual addressing (for example demand paged virtual memory) and its orthogonal instruction set. VAX has been perceived as the quintessential CISC ISA, with its very large number of programmer-friendly addressing modes and machine instructions, highly orthogonal architecture, and instructions for complex operations such as queue insertion or deletion and polynomial evaluation. "VAX" is originally an acronym for Virtual Address eXtension, both because the VAX was seen as a 32-bit extension of the older 16-bit PDP-11 and because it was (after Prime Computer) an early adopter of virtual memory to manage this larger address space. Early versions of the VAX processor implemented a "compatibility mode" that emulated many of the PDP-11's instructions, and were in
    8.00
    3 votes
    66
    6.75
    4 votes
    67

    Intel iAPX 432

    Intel's iAPX 432 was a very ambitious multi-chip microprocessor architecture introduced in 1981. It was unacceptably slow and did not supplant Intel's x86 architecture as planned. The project was Intel's first 32-bit microprocessor design, and intended to be the company's main product line for the 1980s. Many advanced multitasking and memory management features were implemented in hardware, leading to the design being referred to as a Micromainframe. "iAPX" stood for intel Advanced Processor architecture. Originally designed for clock frequencies of up to 10 MHz, actual devices sold were specified for maximum clock speeds of 4 MHz, 5 MHz, 7 MHz and 8 MHz respectively with a peak performance of 2 million instructions per second at 8 MHz. The iAPX 432 was "designed to be programmed entirely in high-level languages", with Ada being primary. Direct hardware support for various data structures was intended to allow modern operating systems for the 432 to be implemented using far less program code than for ordinary processors; combined with direct support for object-oriented programming and garbage collection, this made the hardware (mostly the microcode part) much more complex than most
    6.75
    4 votes
    68
    StrongARM

    StrongARM

    The StrongARM is a family of computer microprocessors developed by Digital Equipment Corporation and manufactured in the late 1990s which implemented the ARM v4 instruction set architecture. It was later sold to Intel in 1997, who continued to manufacture it before replacing it with the XScale in the early 2000s. The StrongARM was a collaborative project between DEC and Advanced RISC Machines to create a faster ARM microprocessor. The StrongARM was designed to address the upper-end of the low-power embedded market, where users needed more performance than the ARM could deliver while being able to accept more external support. Targets were devices such as newer personal digital assistants and set-top boxes. Traditionally, the semiconductor division of DEC was located in Massachusetts. In order to gain access to the design talent in Silicon Valley, DEC opened a design center in Palo Alto, California. This design center was led by Dan Dobberpuhl and was the main design site for the StrongARM project. Another design site which worked on the project was in Austin, Texas that was created by some ex-DEC designers returning from Apple Computer and Motorola. The project was set up in 1995,
    6.75
    4 votes
    69
    Zilog Z80

    Zilog Z80

    • Manufacturers: Zilog
    • Used In Computers: Timex Sinclair 2068
    The Zilog Z80 is an 8-bit microprocessor designed by Zilog and sold from July 1976 onwards. It was widely used both in desktop and embedded computer designs as well as for military purposes. The Z80 and its derivatives and clones make up one of the most commonly used CPU families of all time, and, along with the MOS Technology 6502 family, dominated the 8-bit microcomputer market from the late 1970s to the mid-1980s. Zilog licensed the Z80 design to several vendors, though many East European (for instance, Russian) manufacturers made unlicensed copies. This enabled a small company's product to gain acceptance in the world market since second sources from far larger companies such as Toshiba started to manufacture the device. Consequently, Zilog has made less than 50% of the Z80s since its conception. In recent decades Zilog has refocused on the ever-growing market for embedded systems (for which the original Z80 and the Z180 were designed) and the most recent Z80-compatible microcontroller family, the fully pipelined 24-bit eZ80 with a linear 16 MB address range, has been successfully introduced alongside the simpler Z180 and Z80 products. The Z80 came about when Federico Faggin,
    6.75
    4 votes
    70

    AMD FireStream

    The AMD FireStream is a stream processor produced by Advanced Micro Devices (AMD) to use the stream processing/GPGPU (General Purpose Graphics Processing Units) concept for heavy floating-point computations to target various industries, such as the High Performance Computing (HPC), scientific, and financial sectors. Originally developed by ATI Technologies until the company was acquired by AMD in 2006, the product line was previously branded as both ATI FireStream and AMD Stream Processor. The AMD FireStream can also be used as a floating-point co-processor for offloading CPU calculations, which is part of the Torrenza initiative. Since the release of the past-generation Radeon R520 and GeForce G70 GPU cores, the programmable shaders architecture with large floating-point (FP) throughput has drawn more attention from academic and commercial interest groups, primarily for its ability to process data besides its original intended use of rendering visual effects. Due to the displayed interest, more resources were allocated towards developing GPGPU products — responsible for calculating general purpose mathematical formulas — to process heavy calculations which were previously running
    9.00
    2 votes
    71

    Intel 80386EX

    The Intel 80386EX (386EX) is a variant of the Intel 386 microprocessor designed for embedded systems. Introduced in August 1994 and was successful in the market being used aboard several orbiting satellites and microsatellites. Intel did not manufacture another integrated x86 processor until 2007, when it confirmed the new Pentium M-based Tolapai (EP80579).
    9.00
    2 votes
    72
    Intel Atom

    Intel Atom

    • Manufacturers: Intel Corporation
    • Processor Family: x86
    Intel Atom is the brand name for a line of ultra-low-voltage IA-32 and x86-64 CPUs (or microprocessors) from Intel, originally designed in 45 nm CMOS with subsequent models, codenamed Cedar, using a 32 nm process. Atom is mainly used in netbooks, nettops, embedded applications ranging from health care to advanced robotics, and mobile internet devices (MIDs). Atom processors are based on the Bonnell microarchitecture. On 21 December 2009, Intel announced the Pine Trail platform, including new Atom processor code-named Pineview (Atom N450), with total kit power consumption down 20%. On 28 December 2011, Intel updated the Atom line with the Cedar processors. Intel Atom is a direct successor of the Intel A100 and A110 low-power microprocessors (code-named Stealey), which were built on a 90 nm process, had 512 KB L2 cache and ran at 600 MHz/800 MHz with 3W TDP (Thermal Design Power). Prior to the Silverthorne announcement, outside sources had speculated that Atom would compete with AMD's Geode system-on-a-chip processors, used by the One Laptop per Child (OLPC) project, and other cost and power sensitive applications for x86 processors. However, Intel revealed on 15 October 2007 that it
    9.00
    2 votes
    73
    NS320xx

    NS320xx

    The 320xx or NS32000 was a series of microprocessors from National Semiconductor ("NS", "Natsemi"). They were likely the first 32-bit general-purpose microprocessors on the market, but due to a number of factors never managed to become a major player. The 320xx series was also used as the basis of the Swordfish series of microcontrollers. The processors had 8 general purpose 32-bit registers, plus a series of special-purpose registers: (Additional system registers not listed.) The instruction set was very much in the CISC model, with 2-operand instructions, memory-to-memory operations, flexible addressing modes, and variable-length byte-aligned instruction encoding. Addressing modes could involve up to two displacements and two memory indirections per operand. Unlike some other processors, autoincrement of the base register was not provided; the only exception was a "top of stack" addressing mode that would pop sources and push destinations. Uniquely, the size of the displacement was encoded in its most significant bits: 0, 10 and 11 preceded 7-, 14- and 30-bit signed displacements. (Although the processors were otherwise consistently little-endian, displacements in the instruction
    9.00
    2 votes
    74
    9.00
    2 votes
    75

    PICA200

    • Used In Computers: Nintendo 3DS
    PICA200 is a graphics processing unit (GPU) for embedded devices designed by Digital Media Professionals Inc. (DMP), a Japanese GPU design company. It was announced at SIGGRAPH 2005, and presented on SIGGRAPH 2006 conference. PICA is DMP's brand of graphics processors for embedded devices, scalable from portables up to high-performance arcade systems. PICA200 simply denotes a 200 MHz-clocked GPU from PICA family. PICA200 has an instruction-programmable core (IPC) that gives it capability to change configuration based on demands for specific target system, which will manage with its 3D graphics engine. PICA200 supports second-generation DMPs proprietary MAESTRO graphics technology ("MAESTRO-2G") which includes OpenGL ES 1.1 API support, optional OpenGL ES 1.1 extensions pack and some DMP proprietary extensions which enable custom hardware-based shading algorithms such as procedural texturing, bidirectional reflectance distribution function (BRDF), Cook-Torrance specular highlights, polygon subdivision ("Geo Shader", aka. tessellation), soft shadow projection and per-vertex subsurface scattering (similar to two-sided lighting). The 3D processing core of PICA200 consists of up to four
    9.00
    2 votes
    76
    Ricoh 5A22

    Ricoh 5A22

    • Used In Computers: Super Nintendo Entertainment System
    The Ricoh 5A22 is a microprocessor produced by Ricoh for the Super Nintendo Entertainment System (SNES) video game console. The 5A22 is based around the 16-bit CMD/GTE 65c816, itself a version of the WDC 65C816 (used in the Apple IIGS personal computer). All of the above mentioned processors are based on the MOS Technology 6502 family of processors. In addition to the 65C816 CPU core, the 5A22 contains support hardware, including: The CPU as a whole employs a variable-speed system bus, with bus access times determined by the memory location accessed. The bus runs at 3.58 MHz for non-access cycles and when accessing Bus B and most internal registers, and either 2.68 or 3.58 MHz when accessing Bus A. It runs at 1.79 MHz only when accessing the controller port serial-access registers. It works at approximately 1.5 MIPS and has a theoretical peak of 1.79 million 16-bit adds per second.
    9.00
    2 votes
    77

    Tolapai

    Tolapai is the code name of Intel's system-on-a-chip (SoC) embedded processor which combines an x86 processor core, DDR2 memory controllers and I/O controllers, and a QuickAssist Integrated Accelerator unit for security functions. The Tolapai Embedded processor has 148 million transistors on a 65nm process technology, 1088-ball FCBGA with a 1.092mm pitch, and comes in a 37.5mm × 37.5mm package. It is also Intel's first integrated x86 processor, chipset and memory controller since 1994's 80386EX. Intel EP80579 Integrated Processor for Embedded Computing
    9.00
    2 votes
    78
    Turion 64

    Turion 64

    • Processor Family: AMD Turion
    Turion 64 is the brand name AMD applies to its 64-bit low-consumption (mobile) processors codenamed K8L. The Turion 64 and Turion 64 X2 processors compete with Intel's mobile processors, initially the Pentium M and currently the Intel Core and Intel Core 2 processors. Earlier Turion 64 processors are compatible with AMD's Socket 754. The newer "Richmond" models are designed for AMD's Socket S1. They are equipped with 512 or 1024 KiB of L2 cache, a 64-bit single channel on-die memory controller, and an 800 MHz HyperTransport bus. Battery saving features, like PowerNow!, are central to the marketing and usefulness of these CPUs. All models support: The models support the same features available in Lancaster, plus AMD-V. The model naming scheme does not make it obvious how to compare one Turion with another, or even an Athlon 64. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a performance rating (PR). The first letter is M for single core processors and T for dual core Turion 64 X2 processors. The later in the alphabet that the second letter appears, the more the
    5.80
    5 votes
    79
    AMD Family10h

    AMD Family10h

    The AMD Family10h is AMD's latest microprocessor architecture. The first third-generation Opteron products for servers were launched on September 10, 2007 and the Phenom processors for desktop followed and launched on November 11, 2007 as the immediate successors to the AMD K8 series of processors (Athlon 64, Opteron, Sempron 64). It is commonly perceived that from the time after the use of the codename K8 for the AMD K8 or Athlon 64 processor family, AMD no longer uses K-nomenclatures (originally stood for Kryptonite ) since no K-nomenclature naming convention beyond K8 has appeared in official AMD documents and press releases after the beginning of 2005. The name "K8L" was first coined by Charlie Demerjian, one of the writers of The Inquirer back in 2005 , and was used by the wider IT community as a convenient shorthand along with Stars, as the codenames for desktop line of processors was named under stars or constellations, while according to AMD official documents, the processor family was termed "AMD Next Generation Processor Technology" . It was revealed, by The Inquirer itself, that the codename "K8L" referred to a low-power version of the K8 family, later named
    7.67
    3 votes
    80
    IBM System z

    IBM System z

    • Manufacturers: IBM
    IBM System z, or earlier IBM eServer zSeries, is a brand name designated by IBM to all its mainframe computers as of the year 2000. In 2000, IBM rebranded the existing System/390 to IBM eServer zSeries with the e depicted in IBM's red trademarked symbol, but because no specific machine names were changed for System/390, the zSeries in common use refers only to one generation of mainframes, starting with z900. Since April 2006, with another generation of products, the official designation has changed to IBM System z, which now includes both older IBM eServer zSeries, the IBM System z9 models, the IBM System z10 models, and the newer IBM zEnterprise. Both zSeries and System z brands are named for their availability — z stands for zero downtime. The systems are built with spare components capable of hot failovers to ensure continuous operations. The zSeries line succeeded the System/390 line (S/390 for short), maintaining full backward compatibility. In effect, zSeries machines are the direct, lineal descendants of System/360, announced in 1964, and the System/370 from 1970s. Applications written for these systems can still run, unmodified, with only few exceptions, on the newest
    7.67
    3 votes
    81
    Intel 8008

    Intel 8008

    The Intel 8008 was an early byte-oriented microprocessor designed and manufactured by Intel and introduced in April 1972. It was an 8-bit CPU with an external 14-bit address bus that could address 16KB of memory. Originally known as the 1201, the chip was commissioned by Computer Terminal Corporation (CTC) to implement an instruction set of their design for their Datapoint 2200 programmable terminal. As the chip was delayed and did not meet CTC's performance goals, the 2200 ended up using CTC's own TTL based CPU instead. An agreement permitted Intel to market the chip to other customers after Seiko expressed an interest in using it for a calculator. CTC formed in San Antonio in 1968 under the direction of Austin O. "Gus" Roche and Phil Ray, both NASA engineers. Roche, in particular, was primarily interested in producing a desktop computer. However, given the immaturity of the market, the company's business plan mentioned only a Teletype Model 33 ASR replacement, which shipped as the Datapoint 3300. The case, designed by John "Jack" Frassanito, was deliberately designed to fit in the same space as an IBM Selectric typewriter, and used a video screen shaped to be the same aspect
    7.67
    3 votes
    82

    AMD Phenom

    • Manufacturers: Advanced Micro Devices
    Phenom ( /fɨˈnɒm/) is the 64-bit AMD desktop processor line based on the K10 microarchitecture, in what AMD calls family 10h (10 hex, i.e. 16 in normal decimal numbers) processors, sometimes incorrectly called "K10h". Triple-core versions (codenamed Toliman) belong to the Phenom 8000 series and quad cores (codenamed Agena) to the AMD Phenom X4 9000 series. The first processor in the family was released in 2007. AMD considers the quad core Phenoms to be the first "true" quad core design, as these processors are a monolithic multi-core design (all cores on the same silicon die), unlike Intel's Core 2 Quad series which are a multi-chip module (MCM) design. The processors are on the Socket AM2+ platform. Before Phenom's original release a flaw was discovered in the translation lookaside buffer (TLB) that could cause a system lock-up in rare circumstances; Phenom processors up to and including stepping "B2" and "BA" are affected by this bug. BIOS and software workarounds disable the TLB, and typically incur a performance penalty of at least 10%. This penalty was not accounted for in pre-release previews of Phenom, hence the performance of early Phenoms delivered to customers is expected
    10.00
    1 votes
    83
    10.00
    1 votes
    84

    J–Machine

    The J–Machine (Jellybean-Machine) is a parallel computer designed by the MIT Concurrent VLSI Architecture group in conjunction with the Intel Corporation. The machine uses "jellybean" parts—cheap and multitudinous commodity parts, each with a processor, memory, and a fast communication interface—and a novel network interface to implement fine grained parallel programs. The J-machine was project was started in 1988 based on work in Bill Dally's doctoral work at Caltech. The philosophy of the work was "processors are cheap and memory is expensive," the J in the project's title standing for jellybean which are small cheap candies. In order to make use of large numbers of processors the machine featured a novel network interface using message passing. This allowed a node to send a message to any other node within 2 microseconds. Three 1024-node J-machine systems have been built and are kept at MIT, Caltech and Argonne National Laboratory.
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    1 votes
    85
    10.00
    1 votes
    86
    10.00
    1 votes
    87
    10.00
    1 votes
    88

    CDC STAR-100

    • Manufacturers: Control Data Corporation
    The STAR-100 was a vector supercomputer designed, manufactured, and marketed by Control Data Corporation (CDC). It was one of the first machines to use a vector processor to improve performance on appropriate scientific applications. The name STAR was a construct of the words STrings and ARrays. The 100 came from 100 million floating point operations per second (MFLOPS), the speed at which the machine was designed to operate. The computer was announced very early during the 1970s and was supposed to be several times faster than the CDC 7600, which was then the world's fastest supercomputer with a peak performance of 36 MFLOPS. On August 17, 1971, CDC announced that General Motors had placed the first commercial order for a STAR-100. A number of basic design features of the machine meant that its "real world" performance was much lower than expected when first used commercially in 1974, and was one of the primary reasons CDC was pushed from its former dominance in the supercomputer market when the Cray-1 was announced in 1975. In general organization, the STAR was similar to CDC's earlier supercomputers, where a simple RISC-like CPU was supported by a number of peripheral processors
    6.50
    4 votes
    89

    Alpha 21464

    The Alpha 21464 is an unfinished microprocessor that implements the Alpha instruction set architecture (ISA) developed by Digital Equipment Corporation and later by Compaq after it acquired Digital. The microprocessor was also known as EV8 or Araña, the latter being its code-name. Slated for a 2004 release, it was canceled on 25 June 2001 when Compaq announced that Alpha would be phased out in favor of Itanium by 2004. When it was canceled, the Alpha 21464 was at a late stage of development but had not been taped out. The 21464's origins began in the mid-1990s when computer scientist Joel Emer was inspired by Dean Tullsen's research into simultaneous multithreading (SMT) at the University of Washington. Emer had researched the technology in the late 1990s and began to promote it once he was convinced of its value. Compaq made the announcement that the next Alpha microprocessor would use SMT in October 1999 at Microprocessor Forum 1999. At that time, it was expected that systems using the Alpha 21464 would ship in 2003. The microprocessor was an eight-issue superscalar design with out-of-order execution, four-way SMT and a deep pipeline. It fetches 16 instructions from a 64 KB
    8.50
    2 votes
    90

    Celeron 530

    • Manufacturers: Intel Corporation
    • Processor Family: Celeron
    • Used In Computers: Acer Extensa 5220
    8.50
    2 votes
    91
    Freescale 68LC040

    Freescale 68LC040

    • Processor Family: 68k
    The 68LC040 is a low cost version of the Motorola 68040 microprocessor with no FPU. This makes it less expensive and draw less power. Although the CPU now fits into a feature chart more like the 68020, it continues to include the 040's caches and pipeline and is thus significantly faster than the 020. Some mask revisions of the 68LC040 contained a bug which prevents various software FPU emulators from operating correctly. These revisions are typically found in 68LC040-based Apple Macintosh computers. The bug triggers if an FPU instruction which would trigger an exception resides at the end of a page, and the next page is swapped out. In that case, the CPU will page fault with the PC pointing at that FPU instruction, and then fail to trigger the FPU exception, leading to a variety of errors. Note: In keeping with general Motorola naming, this CPU is often referred to as the LC40.
    8.50
    2 votes
    92
    Intel 8085

    Intel 8085

    The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1977. It was binary compatible with the more-famous Intel 8080 but required less supporting hardware, thus allowing simpler and less expensive microcomputer systems to be built. The "5" in the model number came from the fact that the 8085 requires only a +5-volt (V) power supply rather than the +5V, −5V and +12V supplies the 8080 needed. Both processors were sometimes used in computers running the CP/M operating system, and the 8085 also saw use as a microcontroller, by virtue of its low component count. Both designs were eclipsed for desktop computers by the compatible Zilog Z80, which took over most of the CP/M computer market as well as taking a share of the booming home computer market in the early-to-mid-1980s. The 8085 had a long life as a controller. Once designed into such products as the DECtape controller and the VT100 video terminal in the late 1970s, it served for new production throughout the life span of those products (generally longer than the product life of desktop computers). The 8085 is a conventional von Neumann design based on the Intel 8080. Unlike the 8080 it does not multiplex state signals
    8.50
    2 votes
    93
    PA-RISC family

    PA-RISC family

    • Manufacturers: Hewlett-Packard
    • Processor Family: Reduced instruction set computer
    • Used In Computers: HP 9000
    PA-RISC is an instruction set architecture (ISA) developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer (RISC) architecture, where the PA stands for Precision Architecture. The design is also referred to as HP/PA for Hewlett Packard Precision Architecture. The architecture was introduced on 26 February 1986 when the HP 3000 Series 930 and HP 9000 Model 840 computers were launched featuring the first implementation, the TS1. PA-RISC has been succeeded by the Itanium (originally IA-64) ISA jointly developed by HP and Intel. HP stopped selling PA-RISC-based HP 9000 systems at the end of 2008 but will support servers running PA-RISC chips until 2013. In the late 1980s HP was building four series of computers, all based on CISC CPUs. One line was the IBM PC compatible Intel i286 based Vectra Series started 1986. All others were non-Intel systems. One of them was the HP Series 300 of Motorola 68000-based workstations, another Series 200 line of technical workstations based on a custom silicon on sapphire (SOS) chip design, the SOS based 16-bit HP 3000 classic series and finally the HP 9000 Series 500 minicomputers, based on their own (16 and 32-bit)
    8.50
    2 votes
    94
    8.50
    2 votes
    95

    Snapdragon

    • Used In Computers: HP TouchPad
    Snapdragon is a family of mobile system on chips (SoC) by Qualcomm. Qualcomm considers Snapdragon a "platform" for use in smartphones, tablets, and smartbook devices. The original Snapdragon CPU, dubbed Scorpion, is Qualcomm's own design. It has many features similar to those of the ARM Cortex-A8 core and it is based on the ARM v7 instruction set, but theoretically has much higher performance for multimedia-related SIMD operations. The successor to Scorpion, found in S4 Snapdragon SoCs is named Krait and has many similarities with the ARM Cortex-A15 CPU and is also based on the ARMv7 instruction set. All Snapdragon processors contain the circuitry to decode high-definition video (HD) resolution at 720p or 1080p depending on the Snapdragon chipset. Adreno, the company's proprietary GPU technology, integrated into Snapdragon chipsets (and certain other Qualcomm chipsets) is Qualcomm's own design, using assets the company acquired from AMD. The Adreno 225 GPU in Snapdragon S4 SoCs adds support for DirectX 9/Shader Model 3.0 which makes it compatible with Microsoft Windows 8 Compared to System on chips from many competitors, Snapdragon SoCs have been unique in that they have had the
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    2 votes
    96
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    7.33
    3 votes
    98
    Pentium Pro

    Pentium Pro

    • Manufacturers: Intel Corporation
    • Processor Family: x86-32 (32 bit Intel x86)
    The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995. It introduced the P6 microarchitecture (sometime referred as i686) and was originally intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, respectively, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a more narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red. The Pentium Pro was capable of both dual- and quad-processor configurations. It only came in one form factor, the relatively large rectangular Socket 8. The Pentium Pro was succeeded by the Pentium II Xeon in 1998. The Pentium Pro processor powered ASCI Red, the first computer to reach the TeraFlop performance mark. Belying its name, the Pentium Pro had a completely new microarchitecture, a departure from the Pentium rather than an extension of it. It has a decoupled, 12-stage superpipelined architecture which uses an instruction pool. The Pentium Pro (P6) featured many advanced concepts not found in the Pentium, although it wasn't the
    7.33
    3 votes
    99
    6.25
    4 votes
    100
    6.25
    4 votes
    101
    7.00
    3 votes
    102
    PowerPC

    PowerPC

    • Manufacturers: Motorola
    • Used In Computers: Macintosh
    PowerPC (short for Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a RISC computer architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has since 2006 been renamed Power ISA but lives on as a legacy trademark for some implementations of Power Architecture based processors. Originally intended for personal computers, PowerPC CPUs have since become popular as embedded and high-performance processors. PowerPC was the cornerstone of AIM's PReP and Common Hardware Reference Platform initiatives in the 1990s and while the architecture is well known for being used by Apple's Macintosh lines from 1994 to 2006 (before Apple's transition to Intel), its use in video game consoles and embedded applications provided an array of uses. PowerPC is largely based on IBM's earlier POWER architecture, and retains a high level of compatibility with it; the architectures have remained close enough that the same programs and operating systems will run on both if some care is taken in preparation; newer chips in the POWER series implement the full PowerPC instruction set. The history of
    7.00
    3 votes
    103
    RCA 1802

    RCA 1802

    • Manufacturers: RCA
    • Used In Computers: COSMAC ELF
    The RCA CDP1802, also known as the COSMAC (Complementary Symmetry Monolithic Array Computer), is an 8-bit CMOS microprocessor (µP) introduced by RCA in early 1976. It is currently being manufactured by Intersil Corporation as a high-reliability microprocessor. The 1802 has an architecture different from most other 8-bit microprocessors. In 1970 and 1971, Joseph Weisbecker developed a new 8-bit architecture computer system,. RCA released Weisbecker's work as the COSMAC 1801R and 1801U in early 1975, using its CMOS process (called COSMOS, an acronym for Complementary Silicon/Metal-oxide Semiconductor). In 1976, a team led by Jerry Herzog integrated the two chips into one, the 1802. The RCA 1802 has a static CMOS design with no minimum clock frequency, so that it can be run at very low speeds and low power. It has an 8-bit parallel bus with a bidirectional data bus and a multiplexed address bus (i.e., the high order byte of the 16-bit address and the low order byte of the address take turns in using the 8-bit physical address bus lines, by accessing the bus lines in different clock cycles). The RCA 1802 has a single bit, programmable output port, and four input pins which are directly
    7.00
    3 votes
    104
    Motorola 6809

    Motorola 6809

    • Manufacturers: Motorola
    • Processor Family: Motorola 6800
    • Used In Computers: TRS-80 Color Computer
    The Motorola 6809 is an 8-bit (with some 16-bit features) microprocessor CPU from Motorola, designed by Terry Ritter and Joel Boney and introduced 1978. It was a major advance over both its predecessor, the Motorola 6800, and the related MOS Technology 6502. Among the significant enhancements introduced in the 6809 were the use of two 8-bit accumulators (A and B, which could be combined into a single 16-bit register, D), two 16-bit index registers (X, Y) and two 16-bit stack pointers. The index and stack registers allowed very advanced addressing modes. Program counter relative addressing allowed for the easy creation of position-independent code, while a user stack pointer (U) facilitated the creation of reentrant code. The 6809 was the first microprocessor able to use fully position-independent code without the use of programming tricks. The 6809 was source-compatible with the 6800, though the 6800 had 78 instructions to the 6809's 59. Some instructions were replaced by more general ones which the assembler translated into equivalent operations and some were even replaced by addressing modes. The instruction set and register complement were highly orthogonal, making the 6809
    6.00
    4 votes
    105

    ARM Cortex-A8

    The ARM Cortex-A8 is a processor core designed by ARM Holdings implementing the ARM v7 instruction set architecture. Compared to the ARM11 core, the Cortex-A8 is dual-issue superscalar, achieving roughly twice the instructions executed per clock cycle. Key features of the Cortex-A8 core are: Several system-on-chips (SoC) have implemented the Cortex-A8 core, including:
    8.00
    2 votes
    106
    MOS Technology 6507

    MOS Technology 6507

    • Processor Family: MOS Technology 6502
    The 6507 is an 8-bit microprocessor from MOS Technology, Inc. It is essentially a 6502 chip in a smaller, cheaper 28-pin package. To do this, A15 to A13 and some other signals such as the interrupt lines are not accessible. As a result, it can only address 8 KB of memory, which at the time (1975) was not considered restrictive. The 6507 and 6502 chips use the same underlying silicon layers, and differ only in the final metallisation layer. This ties the interrupt lines to their inactive level so that they are not vulnerable to generating spurious interrupts from stray noise. The first three digits of the chip identifier are part of the silicon layers, and the final digit is in the metallisation layer. Micro-photography of the 6502 and 6507 shows this difference. The 6507 was only widely used in two applications, the best-selling Atari 2600 video game console and the Atari 8-bit family floppy disk controllers for the 810 and 1050 drives. In the 2600, the system was further limited by the design of the cartridge slot, which allowed for only 4KB of external memory to be addressed (the other 4KB was reserved for the internal RAM and I/O chip). Most other machines, notably home
    8.00
    2 votes
    107

    Opteron

    • Manufacturers: Advanced Micro Devices
    • Used In Computers: ProLiant
    Opteron is AMD's x86 server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64). It was released on April 22, 2003 with the SledgeHammer core (K8) and was intended to compete in the server and workstation markets, particularly in the same segment as the Intel Xeon processor. Processors based on the AMD K10 microarchitecture (codenamed Barcelona) were announced on September 10, 2007 featuring a new quad-core configuration. The most-recently released Opteron CPUs are the Bulldozer-based Opteron 4200 and 6200 series processors, codenamed "Valencia" and "Interlagos" respectively. Opteron combines two important capabilities in a single processor: The first capability is notable because at the time of Opteron's introduction, the only other 64-bit architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as major RISC architectures (such as SPARC, Alpha, PA-RISC, PowerPC, MIPS) have been 64-bit for many years. In combining these two capabilities, however, the
    8.00
    2 votes
    108
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    109
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    2 votes
    110

    I686

    i686 is an unofficial name given to the similar instruction set used by several Intel and Intel-compatible microprocessor based on, or compatible with, the Intel P6 microarchitecture. It is not an official Intel designation but a shorthand derived from the fact that the P6 microarchitecture is two generations on from Intel's i486 instruction set, which was the last to use that numerical nomenclature officially. The name is often used when configuring compiler.
    9.00
    1 votes
    111

    Intel Core

    • Used In Computers: iMac
    Intel Core is a brand name used for various mid-range to high-end consumer and business microprocessors made by Intel. In general, processors sold as Core are more powerful variants of the same processors marketed as entry-level Celeron and Pentium. Similarly, identically or more capable versions of Core processors are also sold as Xeon processors for the server and workstation market. The current lineup of Core processors includes the latest Intel Core i7, Intel Core i5, and Intel Core i3, and the older Intel Core 2 Solo, Intel Core 2 Duo, Intel Core 2 Quad, and Intel Core 2 Extreme lines. The original Core brand refers to Intel's 32-bit mobile dual-core x86 CPUs that derived from the Pentium M branded processors. The processor family used a more enhanced version of the Intel P6 microarchitecture. It emerged in parallel with the NetBurst microarchitecture (Intel P68) of the Pentium 4 brand, and was a precursor of the 64-bit Core microarchitecture of Core 2 branded CPUs. The Core brand comprised two branches: the Duo (dual-core) and Solo (Duo with one disabled core, which replaced the Pentium M brand of single-core mobile processor). The Core brand was launched on January 6, 2006
    9.00
    1 votes
    112
    Pentium III

    Pentium III

    • Manufacturers: Intel Corporation
    • Processor Family: x86-32 (32 bit Intel x86)
    The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors. The most notable difference was the addition of the SSE instruction set (to accelerate floating point and parallel calculations), and the introduction of a controversial serial number embedded in the chip during the manufacturing process. Similarly to the Pentium II it superseded, the Pentium III was also accompanied by the Celeron brand for lower-end versions, and the Xeon for high-end (server and workstation) derivatives. The Pentium III was eventually superseded by the Pentium 4, but its Tualatin core also served as the basis for the Pentium M CPUs, which used many ideas from the P6 microarchitecture. Subsequently, it was the Pentium M microarchitecture of Pentium M branded CPUs, and not the NetBurst found in Pentium 4 processors, that formed the basis for Intel's energy-efficient Core microarchitecture of CPUs branded Core 2, Pentium Dual-Core, Celeron (Core), and Xeon. The first Pentium III variant was the
    9.00
    1 votes
    113
    Pentium M

    Pentium M

    • Processor Family: x86-32 (32 bit Intel x86)
    The Pentium M brand refers to a family of mobile single-core x86 microprocessors (with the modified Intel P6 microarchitecture) introduced in March 2003 (during the heyday of the Pentium 4 desktop CPUs), and forming a part of the Intel Carmel notebook platform under the then new Centrino brand. The Pentium M processors had a maximum thermal design power (TDP) of 5–27 W depending on the model, and were intended for use in laptops (thus the "M" suffix standing for mobile). They evolved from the core of the last Pentium III–branded CPU by adding the front-side bus (FSB) interface of Pentium 4, an improved instruction decoding and issuing front end, improved branch prediction, SSE2 support, and a much larger cache. The first Pentium M–branded CPU, code-named Banias, was followed by Dothan. The Pentium M-branded processors were succeeded by the Core-branded dual-core mobile Yonah CPU with a modified microarchitecture. The Pentium M represented a new and radical departure for Intel, as it was not a low-power version of the desktop-oriented Pentium 4, but instead a heavily modified version of the Pentium III Tualatin design (itself based on the Pentium Pro core design). It is optimised
    9.00
    1 votes
    114
    9.00
    1 votes
    115

    ATmega88

    • Processor Family: megaAVR
    The ATmega88 is an electronic integrated circuit microcontroller produced by the Atmel corporation. It has the basic Atmel AVR instruction set. One of the packaging configurations is the dual in-line package (DIP). It has 23 I/O pins, and operates at up to 20MHz for clock speed. It has an 8-bit core. Many of Atmel's microcontrollers in this line have similar instruction sets, so if an engineer learns the instruction set from one of their microprocessors, this knowledge is transferable to other microcontrollers in the line.
    6.67
    3 votes
    116
    PDP-11 architecture

    PDP-11 architecture

    • Manufacturers: Digital Equipment Corporation
    The PDP-11 architecture is an instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). It is implemented by central processing units (CPUs) and microprocessors used in minicomputers of the same name. Additional information is found in DEC's PDP-11 Processor Handbook (see Gordon Bell's 1969 edition ). The PDP-11's 16-bit addresses can address 64 KB. By the time the PDP-11 yielded to the VAX, 8-bit bytes and hexadecimal notation were becoming standard in the industry; however, numeric values on the PDP-11 always used octal notation, and the amount of memory attached to a PDP-11 was always stated as a number of words. The basic logical address space was 32K words, but the high 4K (addresses 160000 through 177777) was not populated because input/output registers on the bus responded to addresses in that range. So originally, a fully loaded PDP-11 had 28K words. The processor reserved low memory addresses for two-word vectors that gave a program counter and processor status word with which to begin a service routine. When an I/O device interrupted a program, it would place the address of its vector on the bus to indicate which service routine should take
    6.67
    3 votes
    117
    5.75
    4 votes
    118

    Intel Atom N280

    • Manufacturers: Intel Corporation
    • Used In Computers: Eee PC 1000HV
    See Intel's website for company information about this second generation of the atom processor. http://www.intel.com/technology/atom/ Maker: Intel Clock Speed 1.66Ghz Front Side Bus 667mhz The Intel Atom N280 is a follow up chip to the popular netbook processor the Atom N270 which can be found in a range of mini computers and power efficient desktops from manufacturers such as Acer, MSI, Asus, Dell, HP/Compaq, and Samsung. Currently as of this writing relatively few models are equipped with this processor comparred with the N270. One such model is the Asus EeePc 1000HE. The Atom N280 shows some potential to provide significant energy savings, this can be seen when comparing two identical models where the only difference is the processor. For example http://event.asus.com/eeepc/comparison/eeepc_comparison.htm shows that the only difference between the Asus EeePC 1000HE and the EeePC 1000HA is that the 1000HA model uses the older Atom N270 processor and has a rated battery life of 7 hours, whereas the 1000HE equipped with the Atom N280 has an additional 2 hours of battery life using the same battery!
    5.75
    4 votes
    119
    7.50
    2 votes
    120
    AMD 5x86

    AMD 5x86

    The Am5x86 processor is an x86-compatible CPU introduced in 1995 by AMD for use in 486-class computer systems. It was one of the fastest, and most universally compatible upgrade paths for users of 486 systems. Introduced in November 1995, the Am5x86 (also known as 5x86-133, Am5x86, X5-133, and sold under various 3rd-party labels such as the Kingston Technology "Turbochip") is an Enhanced Am486 processor with an internally set multiplier of 4, allowing it to run at 133 MHz on systems without official support for clock-multiplied DX2 or DX4 486 processors. Like all Enhanced Am486, the Am5x86 featured write-back L1 cache, and unlike all but a few, a generous 16 kilobytes rather than the more common 8 KB. A rare 150 MHz-rated OEM part was also released by AMD. Since having a clock multiplier of four was not part of the original Socket 3 design, AMD made the 5x86 accept a 2x setting from the motherboard and instead operate at a rate of 4x. When using an Am5x86, the motherboard must be set to the 2x setting. The chip will actually physically fit into an older 486 socket such as a socket 1 or 2 or the original 168-pin 80486 socket, but doing this requires a replacement voltage regulator,
    7.50
    2 votes
    121
    7.50
    2 votes
    122
    7.50
    2 votes
    123
    Motorola 68008

    Motorola 68008

    • Processor Family: 68k
    • Used In Computers: Sinclair QL
    The Motorola 68008 is an 8/16/32-bit microprocessor made by Motorola. It is a version of the Motorola 68000 with an 8-bit external data bus, as well as a smaller address bus. The original 68000 had a 24-bit address bus and a 16-bit data bus. These relatively large buses made it hard to design a low-cost system around the 68000; they were difficult to lay out on a circuit board and needed a lot of supporting circuitry. A 16-bit data bus also required twice as many memory chips as an 8-bit one. The 68008, introduced in 1982, was designed to work with low-cost 8-bit memory systems. Because of its smaller data bus, it was only about half as fast as a 68000 of the same clock speed. However, it was still faster than competing 8-bit microprocessors, because the 68008's internal architecture was based around a 32-bit architecture. Except for its smaller data and address buses, the 68008 behaved identically to the 68000 and had the same internal organization and microarchitecture. The 68008 was an HMOS chip with about 70000 transistors; it came in 8 and 10 MHz speed grades. There were two distinct versions of the chip. The original version came in a 48-pin dual in-line package and had a
    7.50
    2 votes
    124
    NEC µPD780C

    NEC µPD780C

    • Processor Family: Zilog Z80
    The NEC µPD780C was a fully compatible version of the original NMOS version of the ZiLOG Z80 processor. The compatibility included undocumented instructions and other undocumented features. Sinclair ZX80 and ZX81, original versions of the ZX Spectrum, and several MSX computers are among the better known usages of this chip, but it was also employed in musical synthesizers such as Oberheim OB-8 and others.
    7.50
    2 votes
    125

    QUICC

    • Processor Family: 68k
    QUICC is the abbreviation of QUad Integrated Communications Controller. The original QUICC was the 68k-based Motorola 68360. It was followed by the PowerPC-based PowerQUICC, PowerQUICC II, PowerQUICC II+ and PowerQUICC III. Early chips used a separate RISC engine to control the serial interfaces, enhancing performance in these slower speed designs. The PQ2+ and PQ3 designs were the first in this family to offer Gigabit Ethernet speeds using more conventional ethernet controllers without the need for a RISC co-processor (there are some exceptions, such as the 832x bridge chips). These chips have many integrated devices/controllers and were directly targeted at the Telecom industry, but they are still used in other applications as well. The technology has been the backbone of many Motorola Cellular Base stations. The PQ2+ chips have moved into other directions as well. Many designs now have SATA controllers for SAN based applications. But networking will always be their strength. . Every current Freescale PQ CPU/board comes with a working Linux environment. But Freescale continues to offer MQX for PPC (a true RTOS) on a growing basis. MC68360 QUICC datasheet
    7.50
    2 votes
    126
    7.50
    2 votes
    127
    Intel P6

    Intel P6

    The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture. The P6 core was the sixth generation Intel microprocessor in the x86 line. The first implementation of the P6 core was the Pentium Pro CPU in 1995, the immediate successor to the original Pentium design (P5). Some techniques first used in the x86 space in the P6 core include: The P6 architecture lasted three generations from the Pentium Pro to Pentium III, and was widely known for low power consumption, excellent integer performance, and relatively high instructions per cycle (IPC). When the new NetBurst (P68) architecture was conceived, initially in the Willamette core, which had relatively low IPC and less efficient overall design both in terms of power consumption and throughput efficiency, the P6 line of processing cores were largely thought to be abandoned. Upon
    4.80
    5 votes
    128
    Pentium D

    Pentium D

    • Manufacturers: Intel Corporation
    • Processor Family: x86-32 (32 bit Intel x86)
    The Pentium D brand refers to two series of desktop dual-core 64-bit x86-64 microprocessors with the NetBurst microarchitecture manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to each other on a multi-chip module package. The brand's first processor, codenamed Smithfield, was released by Intel on May 25, 2005. Nine months later, Intel introduced its successor, codenamed Presler, but without offering significant upgrades in design, still resulting in relatively high power consumption. By 2004, the NetBurst processors reached a clock speed barrier at 3.8 GHz due to a thermal (and power) limit exemplified by the Presler's 130 watt thermal design power (a higher TDP requires additional cooling that can be prohibitively noisy or expensive). The future belonged to more energy efficient and slower clocked dual-core CPUs on a single die instead of two. The final shipment date of the dual die Presler chips was August 8, 2008, which marked the end of the Pentium D brand and also the NetBurst microarchitecture. The twin-core CPU is capable of running multi-threaded applications typical in transcoding of audio and video, compressing, photo and
    5.50
    4 votes
    129
    5.50
    4 votes
    130

    UltraSPARC T1

    Sun Microsystems' UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename "Niagara", is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU typically uses 72 W of power at 1.4 GHz. Afara Websystems pioneered a radical thread-heavy SPARC design. The company was purchased by Sun, and the intellectual property became the foundation of the CoolThreads line of processors, starting with the T1. The T1 is a new-from-the-ground-up SPARC microprocessor implementation that conforms to the UltraSPARC Architecture 2005 specification and executes the full SPARC V9 instruction set. Sun has produced two previous multicore processors (UltraSPARC IV and IV+), but UltraSPARC T1 is its first microprocessor that is both multicore and multithreaded. The processor is available with four, six or eight CPU cores, each core able to handle four threads concurrently. Thus the processor is capable of processing up to 32 threads concurrently. UltraSPARC T1 can be partitioned in a similar way to high-end Sun SMP systems. Thus, several cores can be partitioned for running a single or group of processes and/or
    5.50
    4 votes
    131

    AMD K9

    The AMD K9 represents a microarchitecture by AMD designed to replace the K8 processors, featuring dual-core processing. K9 appears originally to have been an ambitious 8 issue per clock cycle core redesign of the K7 or the K8 processor core. At one point, K9 was the Greyhound project at AMD, and was worked on by the K7 design team beginning in early 2001, with tape-out revision A0 scheduled for 2003. The L1 instruction cache was said to hold decoded instructions, essentially the same as Intel's trace cache. The existence of a massively parallel CPU design concept for heavily multi threaded applications has also been revealed, as a planned successor to K8. This was reportedly canceled in the conceptualization phase, after about 6 months' work. At one time K9 was the internal codename for the dual-core AMD64 processors as the brand Athlon 64 X2, however AMD has distanced itself from the old K series naming convention, and now seeks to talk about a portfolio of products, tailored to different markets.
    6.33
    3 votes
    132

    ARM7TDMI

    ARM7 is a generation of ARM processor designs. This generation introduced the Thumb 16-bit instruction set providing improved code density compared to previous designs. The most widely used ARM7 designs implement the ARMv4T architecture, but some implement ARMv3 or ARMv5TEJ. All these designs use a Von Neumann architecture, thus the few versions comprising a cache do not separate data and instruction caches. Some ARM7 cores are obsolete. One historically significant model, the ARM7DI is notable for having introduced JTAG based on-chip debugging; the preceding ARM6 cores did not support it. The "D" represented a JTAG TAP for debugging; the "I" denoted an ICEBreaker debug module supporting hardware breakpoints and watchpoints, and letting the system be stalled for debugging. Subsequent cores included and enhanced this support. The ARM7-TDMI (ARM7-Thumb+Debug+Multiplier+ICE) processor is a 32-bit RISC CPU designed by ARM, and licensed for manufacture by an array of semiconductor companies. In 2009 it remains one of the most widely used ARM cores, and is found in numerous deeply embedded system designs. Texas Instruments licensed the ARM7-TDMI, which was designed into the Nokia 6110.
    6.33
    3 votes
    133
    Intel 80486SX

    Intel 80486SX

    Intel's i486SX was a modified Intel 486DX microprocessor with its floating-point unit (FPU) disconnected. All early 486SX chips were actually i486DX chips with a defective FPU. If testing showed that the central processing unit was working but the FPU was defective, the FPU's power and bus connections were destroyed with a laser and the chip was sold cheaper as an SX; if the FPU worked it was sold as a DX. Computer manufacturers that used these processors include Packard Bell, Compaq and IBM. Back in the early 1990s, common wisdom held that it wasn't advantageous for most users to have a FPU. Thus, many typical household applications already in existence like word processing and email were designed specifically to avoid using floating point operations. When floating point operations needed to be performed they were still performed, but not in hardware; instead the operations were usually facilitated by transparent software emulation. Some systems allowed the user to upgrade the i486SX to a CPU with a FPU. The FPU upgrade device was shipped as the i487, which was a full blown i486DX chip with an extra pin. The i487 was installed in an upgrade socket and the extra pin was either a
    6.33
    3 votes
    134

    ARM11

    • Used In Computers: Raspberry Pi
    ARM11 is an ARM architecture 32-bit RISC microprocessor family which introduced the ARMv6 architectural additions. These include SIMD media instructions, multiprocessor support and a new cache architecture. The implementation included significantly improved instruction processing pipeline, compared to previous ARM9 or ARM10 families, and is used in smartphones from Apple, Nokia, and others. The initial ARM11 core (ARM1136) was released to licensees in late 2002. The ARM11 family are currently the only ARMv6-architecture cores. There are however ARMv6-M cores (Cortex-M0 and Cortex-M1), addressing microcontroller applications; ARM11 cores target more demanding applications. In terms of instruction set, the ARM11 builds on the preceding ARM9 generation. It incorporates all ARM926EJ-S features and adds the ARMv6 instructions for media support (SIMD) and accelerating IRQ response. Microarchitecture improvements in ARM11 cores include: JTAG debug support (for halting, stepping, breakpoints, and watchpoints) was simplified. The EmbeddedICE module was replaced with an interface which became part of the ARMv7 architecture. The hardware tracing modules (ETM and ETB) are compatible, but
    8.00
    1 votes
    135
    DEC Alpha

    DEC Alpha

    • Manufacturers: Digital Equipment Corporation
    • Used In Computers: Cray T3D
    Alpha, originally known as Alpha AXP, is a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC), designed to replace the 32-bit VAX complex instruction set computer (CISC) ISA and its implementations. Alpha was implemented in microprocessors originally developed and fabricated by DEC. These microprocessors were most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup. Several third-party vendors also produced Alpha systems, including PC form factor motherboards. Operating systems that supported Alpha included OpenVMS (previously known as OpenVMS AXP), Tru64 UNIX (previously known as DEC OSF/1 AXP and Digital UNIX), Windows NT (until 4.0 SP6 and Windows 2000 RC1), GNU/Linux (Debian GNU/Linux, Gentoo Linux and Red Hat Linux), BSD UNIX (NetBSD, OpenBSD and FreeBSD up to 6.x), as well as the L4Ka::Pistachio kernel. The Alpha architecture was sold, along with most parts of DEC, to Compaq in 1998. Compaq, already an Intel customer, decided to phase out Alpha in favor of the forthcoming Hewlett-Packard/Intel Itanium
    8.00
    1 votes
    136

    Intel Core 2 Quad

    • Processor Family: x86-64
    Currently, the latest microprocessor of the new generation of computers accompanied by the Intel Core 2 Extreme is the new Intel Core 2 Quad processor. With the latest features that strike people people, the Intel core 2 Quad processor, currently which is leading Intel in microprocessors, yet costly, delivers the best. It has much more ram as compared to the older versions of Intel, speeding desktops to do things faster. It is now on rapid sale. The Intel Core 2 Quad represents new speed and power for computers as compared to the older versions of microprocessors. This expensive microprocessor is built in a 45nm technology with Intel HD Boost and hafnium-infused circuitry by Intel and delivers amazing performance and power efficiency. It works perfectly while encoding, rendering, editing and streaming. With four processing cores in the micro-chip, 1333 MHz, and a large amount of ram, it can bring high quality multimedia and entertainment to you house. It also has 12MB of shared L2 cache. This chip or microprocessor is made or designed to result in more energy efficient performance and memory performance. The Intel core 2 Quad processor gives you a vast range of applications and
    8.00
    1 votes
    137
    8.00
    1 votes
    138

    Arithmetic logic unit

    • Used In Computers: CM-2
    In computing, an arithmetic and logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers. The processors found inside modern CPUs and graphics processing units (GPUs) accommodate very powerful and very complex ALUs; a single component may contain a number of ALUs. Mathematician John von Neumann proposed the ALU concept in 1945, when he wrote a report on the foundations for a new computer called the EDVAC. Research into ALUs remains an important part of computer science, falling under Arithmetic and logic structures in the ACM Computing Classification System. An ALU must process numbers using the same format as the rest of the digital circuit. The format of modern processors is almost always the two's complement binary number representation. Early computers used a wide variety of number systems, including Ones' complement, Two's complement, sign-magnitude format, and even true decimal systems, with various representation of the digits. ALUs for each one of these that makes it
    7.00
    2 votes
    139
    7.00
    2 votes
    140
    Cyrix 6x86

    Cyrix 6x86

    • Manufacturers: SGS Thomson Microelectronics
    The Cyrix 6x86 (codename M1) is a sixth-generation, 32-bit 80x86-compatible microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson. It was originally released in 1996. The 6x86 is superscalar and superpipelined and performs register renaming, speculative execution, out-of-order execution, and data dependency removal. However, it continued to use native x86 execution and ordinary microcode only, like Centaur's Winchip, unlike competitors Intel and AMD which introduced the method of dynamic translation to micro-operations with Pentium Pro and K5. With regard to internal caches, it has a 16-kB primary cache and is socket-compatible with the Intel P54C Pentium. It was also unique in that it was the only x86 design to incorporate a 256-byte Level 0 scratchpad cache. It has six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+. These performance levels do not map to the clock speed of the chip itself (for example, a PR 133+ ran at 110 MHz, a PR 166+ ran at 133 MHz, etc.). The 6x86 and 6x86L weren't completely compatible with the Intel P5 Pentium instruction set and is not multi-processor capable. For this reason, the chip identified itself as a
    7.00
    2 votes
    141

    I.MX21

    The Freescale i.MX21 (MC9328MX21) is an application processor, consisting of an ARM926EJ-S processor core with some additional peripherals. It is part of Freescale's i.MX range of ARM9/11-based multimedia application processor family. It is intended for use in low-power handheld devices. This device is used in the following development systems: It is used in the following single board computers: And used in the following devices:
    7.00
    2 votes
    143
    Motorola 68EC020

    Motorola 68EC020

    • Processor Family: 68k
    The 68EC020 is a microprocessor from Motorola. It is a lower cost version of the Motorola 68020, the difference between the two being that the 68EC020 only has a 24-bit address bus, rather than the 32-bit address bus of the full 68020, and thus is only able to address 16 MB of RAM. The 68EC020 was used as the CPU of Commodore's Amiga 1200 home computer, and their Amiga CD32 games console.
    7.00
    2 votes
    144
    PowerPC G4

    PowerPC G4

    • Used In Computers: PowerBook
    PowerPC G4 is a designation used by Apple Computer to describe a fourth generation of 32-bit PowerPC microprocessors. Apple has applied this name to various (though closely related) processor models from Freescale, a former part of Motorola. Macintosh computers such as the PowerBook G4 and iBook G4 laptops and the Power Mac G4 and Power Mac G4 Cube desktops all took their name from the processor. PowerPC G4 processors were also used in the eMac, first-generation Xserves, first-generation Mac Minis, and the iMac G4 before the introduction of the PowerPC 970. Apple completely phased out the G4 series for desktop models after it selected the 64-bit IBM-produced PowerPC 970 processor as the basis for its PowerPC G5 series. The last desktop model that used the G4 was the Mac Mini which now comes with an Intel processor. The last portable to use the G4 was the iBook G4 but was replaced by the Intel-based MacBook. The PowerBook G4 has been replaced by the Intel-based MacBook Pro. The PowerPC G4 processors are also popular in other computer systems, such as Amiga clones, like the Pegasos from Genesi. Besides desktop computers the PowerPC G4 is popular in embedded environments, like
    7.00
    2 votes
    145
    7.00
    2 votes
    146
    R800

    R800

    • Used In Computers: MSX turbo R
    The R800 is the central processing unit used in the MSX Turbo-R home computer. The R800 was designed by the ASCII company of Japan, and the goals were to have the fastest CPU possible, while maintaining compatibility with old MSX Zilog Z80-based hardware and software. In order to preserve software compatibility with old MSX software, the R800 uses a superset of the Z80 instruction set. In addition to all the Z80 opcodes, two multiplication instruction were added, MULUB (8-bit), and MULUW (16-bit). Also, many of the undocumented Z80 instructions were made official, these include all the opcodes dealing with IX and IY as 8-bit registers (IXh, IXl, IYh, IYl). As the R800 is not based directly on the Z80, but stems from the Z800 family, it lacks some of the other undocumented Z80 features. For instance, the undocumented flags represented in bits 3 and 5 of the F register don't assume the same values as in Z80 (causing it to fail ZEXALL tests) and the undocumented opcode often called SLL is replaced by another undocumented opcode called TST. On the hardware side, radical changes were made. The internal 8-bit ALU of the Z80 was replaced with a new 16-bit ALU. Opcodes like ADD HL, BC,
    7.00
    2 votes
    147
    Texas Instruments OMAP

    Texas Instruments OMAP

    • Used In Computers: Nokia 770
    OMAP (Open Multimedia Applications Platform) developed by Texas Instruments is a category of proprietary system on chips (SoCs) for portable and mobile multimedia applications. OMAP devices generally include a general-purpose ARM architecture processor core plus one or more specialized co-processors. Earlier OMAP variants commonly featured a variant of the Texas Instruments TMS320 series digital signal processor. On 26 September, 2012, Texas Instruments announced that they would wind down their operations in smartphone and tablet oriented OMAP chips and instead focus on embedded platforms. The fate of OMAP5 therefore remains uncertain. The OMAP family consists of three product groups classified by performance and intended application: Further, two main distribution channels exist, and not all parts are available in both channels. The genesis of the OMAP product line is from partnership with cell phone vendors, and the main distribution channel involves sales directly to such wireless handset vendors. Parts developed to suit evolving cell phone requirements are flexible and powerful enough to support sales through less specialized catalog channels; some OMAP 1 parts, and many OMAP 3
    7.00
    2 votes
    148
    Turion 64 X2

    Turion 64 X2

    • Processor Family: AMD Turion
    Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete with Intel's Core and Core 2 CPUs. The Turion 64 X2 was launched on May 17, 2006, after several delays. These processors use Socket S1, and feature DDR2 memory. They also include AMD Virtualization Technology and more power-saving features. AMD first produced the Turion 64 X2 on IBM's 90 nm Silicon on insulator (SOI) process (cores with the Taylor codename). As of May 2007, they have switched to a 65 nm Silicon-Germanium stressed process, which was recently achieved through the combined effort of IBM and AMD, with 40% improvement over comparable 65 nm processes. The earlier 90 nm devices were codenamed Taylor and Trinidad, while the newer 65 nm cores have codename Tyler.
    7.00
    2 votes
    149
    7.00
    2 votes
    150
    6.00
    3 votes
    151
    DEC J-11

    DEC J-11

    • Manufacturers: Digital Equipment Corporation
    • Processor Family: PDP-11 architecture
    The J-11 is a microprocessor chip set that implements the PDP-11 instruction set architecture (ISA) jointly developed by Digital Equipment Corporation and Harris Semiconductor. It was a high-end chip set designed to integrate the performance and features of the PDP-11/70 onto a handful of chips. It was used in the PDP-11/73, PDP-11/83 and Professional 380. It consisted of a data path chip and a control chip in ceramic leadless packages mounted on a single ceramic hybrid DIP package. The control chip incorporated a control sequencer and a microcode ROM. An optional separate floating-point acclerator (FPA) chip could be used, and was packaged in a standard DIP. The data path chip and control chip were fabricated by Harris in a CMOS process while the FPA was fabricated by Digital in their "ZMOS" NMOS process. The design originally was intended to support multiple control chips to allow implementation of additional instructions such as the Commercial Instruction Set (CIS), but no such control chips were ever offered.
    6.00
    3 votes
    152
    6.00
    3 votes
    153
    6.00
    3 votes
    154
    Xilinx

    Xilinx

    Xilinx, Inc. (NASDAQ: XLNX) ( /ˈzaɪlɪŋks/ ZY-lingks) is an American technology company, primarily a supplier of programmable logic devices. It is known for inventing the field programmable gate array (FPGA) and as the first semiconductor company with a fabless manufacturing model. Founded in Silicon Valley in 1984, the company is headquartered in San Jose, California, with additional offices in Longmont, Colorado; Dublin, Ireland; Singapore; Hyderabad, India; and Tokyo, Japan. Ross Freeman, Bernard Vonderschmitt, and James V Barnett II, who all had worked for integrated circuit and solid-state device manufacturer Zilog Corp, founded Xilinx in 1984. While working for Zilog, Freeman wanted to create chips that acted like a blank tape, allowing users to program the technology themselves. At the time, the concept was paradigm-changing. "The concept required lots of transistors and, at that time, transistors were considered extremely precious – people thought that Ross's idea was pretty far out", said Xilinx Fellow Bill Carter, who when hired in 1984 as the first IC designer was the Xilinx's eighth employee. Big semiconductor manufacturers were enjoying strong profits by producing
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    3 votes
    155
    MOS Technology 6501

    MOS Technology 6501

    • Processor Family: MOS Technology 6502
    The 6501 is an eight-bit microprocessor, the first sold by MOS Technology. The 6501 is the first member of the 65xx series of microprocessors. It was the first microprocessor to be sold for US$25 in unit quantities. It was created by several ex-members of Motorola's design team and was pin-compatible with the Motorola 6800 microprocessor. It was not software-compatible, offering several addressing modes not available on the 6800. The 6501 operates at 1MHz designed using an NMOS process. It has a 16 bit address bus capable of addressing 64kiB of memory. The 6502 is a 6501 with the pins re-arranged following a lawsuit by Motorola over the 6501's pin arrangement. As a result of the lawsuit, MOS was forced to pay the legal costs and promise to destroy every 6501 they had manufactured. The 6502 also added a two-phase clock generator, so it only needed a single phase clock input, simplifying system design. This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.
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    4 votes
    156
    Athlon II

    Athlon II

    Athlon II is a family of AMD multi-core 45 nm central processing units, which is aimed at the midrange to budget market and is a complementary product lineup to the Phenom II. The Athlon II series is based on the AMD K10 architecture and derived from the Phenom II series. However, unlike its Phenom siblings, it does not contain any L3 Cache. There are two principal Athlon II dies: the dual-core Regor die with 1 MB L2 Cache per core and the four-core Propus with 512 KB per core. Regor is a native dual-core design with lower TDP and additional L2 to offset the removal of L3 cache. The Athlon II x2 200e-220 have less L2 cache than the rest of the Regor line. The triple-core Rana is derived from the Propus quad-core design, with one core disabled. In some cases, the Phenom II Deneb die is used with disabled L3 cache and cores in the case. Includes: AMD Direct Connect Architecture AMD Wide Floating Point Accelerator AMD Digital Media XPress 2.0 Technology AMD PowerNow! Technology (Cool’n’Quiet Technology) HyperTransport Technology (not the same as Intel Hyper-Threading Technology) Processors with an "e" following the model number (e.g., 245e) are low-power models, typically 45W for
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    3 votes
    157
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    158

    8-bit

    In computer architecture, 8-bit integers, memory addresses, or other data units are those that are at most 8 bits (1 octet) wide. Also, 8-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 8-bit is also a term given to a generation of microcomputers in which 8-bit microprocessors were the norm. The first widely adopted 8-bit microprocessor was the Intel 8080, being used in many hobbyist computers of the late 1970s and early 1980s, often running the CP/M operating system; it had 8-bit data words and 16-bit addresses. The Zilog Z80 (compatible with the 8080) and the Motorola 6800 were also used in similar computers. The Z80 and the MOS Technology 6502 8-bit CPUs were widely used in home computers and game consoles of the '70s and '80s. Many 8-bit CPUs or microcontrollers are the basis of today's ubiquitous embedded systems. There are 2 (256) possible values for 8 bits. Eight-bit CPUs use an 8-bit data bus and can therefore access 8 bits of data in a single machine instruction. The address bus is typically a double octet wide (i.e. 16-bit), due to practical and economical considerations. This implies a direct address space
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    2 votes
    159
    AMD Am2900

    AMD Am2900

    • Manufacturers: Advanced Micro Devices
    Am2900 is a family of integrated circuits (ICs) created in 1975 by Advanced Micro Devices (AMD). They were constructed with bipolar devices, in a bit-slice topology, and were designed to be used as modular components each representing a different aspect of a computer control unit (CCU). By using a bit slicing technique, Am2900 family was able to implement a CCU with data, addresses, and instructions to be any multiple of 4-bits by multiplying the number of ICs. One major problem with this modular technique was it required a larger amount of ICs to implement what could be done on a single CPU IC. The Am2901 chip was the arithmetic-logic unit (ALU), and the "core" of the series. It could count using 4 bits and implement binary operations as well as various bit-shifting operations. There are probably many more, but here are some known machines using these parts: The Am2900 Family Data Book lists: Many of these chips also have 7400 series numbers such as the 74F2960 / Am2960.
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    2 votes
    160
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    161
    Freescale DragonBall

    Freescale DragonBall

    • Processor Family: 68k
    Motorola/Freescale Semiconductor's DragonBall, or MC68328, is a microcontroller design based on the famous 68000 core, but implemented as an all-in-one low-power solution for handheld computer use. It was designed by Motorola in Hong Kong and released in 1995. The DragonBall's major design win was in earlier versions of the Palm Computing platform; however, from Palm OS 5 onwards it has been superseded by ARM-based processors from Texas Instruments and Intel. The processor is also used in some of the AlphaSmart line of portable word processors. Examples include the Dana and Dana Wireless. The processor is capable of speeds of up to 16.58 MHz and can run up to 2.7 MIPS (million instructions per second), for the base 68328 and DragonBall EZ (MC68EZ328) model. It was extended to 33 MHz, 5.4 MIPS for the DragonBall VZ (MC68VZ328) model, and 66 MHz, 10.8 MIPS for the DragonBall Super VZ (MC68SZ328). It is a 32-bit processor with 32-bit internal and external address bus (24-bit external address bus for EZ and VZ variants) and 32-bit data bus. It has many built-in functions, like a color and grayscale display controller, PC speaker sound, serial port with UART and IRDA support, UART
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    2 votes
    162
    Intel 8051

    Intel 8051

    • Manufacturers: Atmel
    • Processor Family: Harvard architecture
    The Intel MCS-51 (commonly referred to as 8051) is a Harvard architecture, single chip microcontroller (µC) series which was developed by Intel in 1980 for use in embedded systems. Intel's original versions were popular in the 1980s and early 1990s. While Intel no longer manufactures the MCS-51, binary compatible derivatives remain popular today. In addition to these physical devices, several companies also offer MCS-51 derivatives as IP cores for use in FPGAs or ASICs designs. Intel's original MCS-51 family was developed using NMOS technology, but later versions, identified by a letter C in their name (e.g., 80C51) used CMOS technology and consumed less power than their NMOS predecessors. This made them more suitable for battery-powered devices. The 8051 architecture provides many functions (CPU, RAM, ROM, I/O, interrupt logic, timer, etc.) in a single package One particularly useful feature of the 8051 core was the inclusion of a boolean processing engine which allows bit-level boolean logic operations to be carried out directly and efficiently on select internal registers and select RAM locations. This advantageous feature helped cement the 8051's popularity in industrial
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    2 votes
    163
    Intel i860

    Intel i860

    The Intel i860 (also known as 80860) was a RISC microprocessor from Intel, first released in 1989. The i860 was one of Intel's first attempts at an entirely new, high-end instruction set since the failed Intel i432 from the 1980s. It was released with considerable fanfare, slightly obscuring the earlier Intel i960 which was successful in some niches of embedded systems, and which many considered to be a better design. The i860 never achieved commercial success and the project was terminated in the mid-1990s. Andy Grove blamed the i860's failure in the marketplace on Intel being stretched too thin: The i860 combined a number of features that were unique at the time, most notably its VLIW (Very Long Instruction Word) architecture and powerful support for high-speed floating point operations. The design mounted a 32-bit ALU "Core" along with a 64-bit FPU that was itself built in three parts: an adder, a multiplier, and a graphics processor. The system had separate pipelines for the ALU, floating point adder and multiplier, and could hand off up to three operations per clock. (I.e., two instructions - one integer instruction and one floating point multiply-and-accumulate instruction
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    2 votes
    164
    Microcontroller

    Microcontroller

    A microcontroller (sometimes abbreviated µC, uC or MCU) is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM. Microcontrollers are designed for embedded applications, in contrast to the microprocessors used in personal computers or other general purpose applications. Microcontrollers are used in automatically controlled products and devices, such as automobile engine control systems, implantable medical devices, remote controls, office machines, appliances, power tools, toys and other embedded systems. By reducing the size and cost compared to a design that uses a separate microprocessor, memory, and input/output devices, microcontrollers make it economical to digitally control even more devices and processes. Mixed signal microcontrollers are common, integrating analog components needed to control non-digital electronic systems. Some microcontrollers may use four-bit words and operate at clock rate frequencies as low as 4 kHz, for low power consumption (milliwatts or microwatts).
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    2 votes
    165
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    166

    Super Harvard Architecture Single-Chip Computer

    • Manufacturers: Analog Devices
    The 'Super Harvard Architecture Single-Chip Computer (SHARC') is a high performance floating-point and fixed-point DSP from Analog Devices, not to be confused with Hitachi's SuperH (SH) microprocessor. SHARC is used in a variety of signal processing applications ranging from single-CPU guided artillery shells to 1000-CPU over-the-horizon radar processing computers. The original design dates to about January 1994. SHARC processors are or were used because they have offered good floating-point performance per watt. SHARC processors are typically intended to have a good number of serial links to other SHARC processors nearby, to be used as a low-cost alternative to SMP. The SHARC is a Harvard architecture word-addressed VLIW processor; it knows nothing of 8-bit or 16-bit values since each address is used to point to a whole 32-bit word, not just a byte. It is thus neither little-endian nor big-endian, though a compiler may use either convention if it implements 64-bit data and/or some way to pack multiple 8-bit or 16-bit values into a single 32-bit word. Analog Devices chose to avoid the issue by using a 32-bit char in their C compiler. The word size is 48-bit for instructions, 32-bit
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    2 votes
    167
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    4 votes
    168
    Cell Broadband Engine (CBE) microprocessor

    Cell Broadband Engine (CBE) microprocessor

    • Manufacturers: IBM
    • Used In Computers: PlayStation 3
    Cell is a microprocessor architecture jointly developed by Sony, Sony Computer Entertainment, Toshiba, and IBM, an alliance known as "STI". The architectural design and first implementation were carried out at the STI Design Center in Austin, Texas over a four-year period beginning March 2001 on a budget reported by Sony as approaching US$400 million. Cell is shorthand for Cell Broadband Engine Architecture, commonly abbreviated CBEA in full or Cell BE in part. Cell combines a general-purpose Power Architecture core of modest performance with streamlined coprocessing elements which greatly accelerate multimedia and vector processing applications, as well as many other forms of dedicated computation. The first major commercial application of Cell was in Sony's PlayStation 3 game console. Mercury Computer Systems has a dual Cell server, a dual Cell blade configuration, a rugged computer, and a PCI Express accelerator board available in different stages of production. Toshiba had announced plans to incorporate Cell in high definition television sets, but seems to have abandoned the idea. Exotic features such as the XDR memory subsystem and coherent Element Interconnect Bus (EIB)
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    1 votes
    169
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    170
    Motorola 68020

    Motorola 68020

    • Manufacturers: Motorola
    • Processor Family: 68k
    • Used In Computers: Amiga 1200
    The Motorola 68020 is a 32-bit microprocessor from Motorola, released in 1984. It is the successor to the Motorola 68010 and is succeeded by the Motorola 68030. A lower cost version was also made available, known as the 68EC020. In keeping with naming practices common to Motorola designs, the 68020 is usually referred to as the '020, pronounced oh-two-oh or oh-twenty". The 68020 had 32-bit internal and external data and address buses, compared to the early models with 16-bit data and 23-bit address busses. Newer packaging methods allowed the '020 to feature more external pins without the large size that the earlier dual in-line package method required. The 68EC020 lowered cost through a 24-bit address bus. The 68020 was produced at speeds ranging from 12 MHz to 33 MHz. The 68020 added many improvements to the 68010 including a 32-bit arithmetic logic unit (ALU), external data bus and address bus, and new instructions and addressing modes. The 68020 (and 68030) had a proper three-stage pipeline. Though 68010 had a "loop mode", which sped loops through what was effectively a tiny instruction cache, it had only two memory location and was thus little used. The 68020 replaced this with
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    1 votes
    171
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    172
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    1 votes
    173

    Samsung Galaxy Player 50

    The Samsung Galaxy Player is an Android-based line of tablets/portable media players produced by Samsung. The product was first debuted on 2 September at the 2010 IFA in Berlin, and was showcased at the 2011 CES in Las Vegas. All of the Galaxy Player models except the Galaxy Player 5.0 support 3-axis accelerometer and 3-axis gyroscope. The Galaxy Player 4.0 and 5.0 launched in U.S. in October 2011. The Galaxy Player 4 features a 4" multi-touch capacitative touchscreen, a "Super Clear" LCD with 800x480 resolution (WVGA). It has 8 GB of internal flash storage, that can be expanded with a microSD card (up to 32 GB cards are supported). It has two cameras (a VGA front camera, and a 3.2 megapixel back camera), WiFi, FM radio, and a GPS, and runs Android 2.3.5 ("Gingerbread"). Its design is almost the same of the Samsung Galaxy S phone (I9000) but with a lower resolution camera (3.2 MP instead of 5.0 MP) and without phone functions or 3G. The CPU is a Samsung Exynos 3110 Applications Processor. The Galaxy Player 5 features a 5" TFT LCD (WVGA) 800x480 with MDNIE (Mobile Digital Natural Image engine). It has 8 GB(US Version) and 16 GB (International Version) of internal flash storage that
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    1 votes
    174
    Sun-2

    Sun-2

    The Sun-2 series of UNIX workstations and servers was launched by Sun Microsystems in November 1983. As the name suggests, the Sun-2 represented the second generation of Sun systems, superseding the original Sun-1 series. The Sun-2 series used a 10 MHz Motorola 68010 microprocessor with a proprietary Sun-2 Memory Management Unit (MMU), which enabled it to be the first Sun architecture to run a full virtual memory UNIX implementation, SunOS 1.0, based on 4.1BSD. Early Sun-2 models were based on the Intel Multibus architecture, later ones using VMEbus instead, which was also used in the later Sun-3 and Sun-4 families. Sun-2 systems were supported in SunOS until version 4.0.3. Support for Multibus Sun-2 systems was added to NetBSD in 2002, with the release of NetBSD 1.6. Models are listed in approximately chronological order. A desktop disk and tape sub-system was introduced for the Sun-2/50 desktop workstation. It could hold a 5 ¼" disk drive and 5 ¼" tape drive. It used DD-50 (sometimes erroneously referred to as DB-50) connectors for its SCSI cables, a Sun specific design. It was often referred to as a "Sun Shoebox". Sun-1 systems upgraded with Sun-2 Multibus CPU boards were
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    1 votes
    175
    Athlon

    Athlon

    • Manufacturers: Advanced Micro Devices
    • Processor Family: x86
    Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon (now called Athlon Classic) was the first seventh-generation x86 processor and, in a first, retained the initial performance lead it had over Intel's competing processors for a significant period of time. The original Athlon also had the distinction of being the first desktop processor to reach speeds of one gigahertz (GHz). AMD has continued using the Athlon name with the Athlon 64, an eighth-generation processor featuring x86-64 (later renamed AMD64) architecture, and the Athlon II. The Athlon made its debut on June 23, 1999. Athlon is the ancient Greek word for "Champion/trophy of the games". AMD ex-CEO and founder Jerry Sanders developed strategic partnerships during the late 1990s to improve AMD's presence in the PC market based on the success of the AMD K6 architecture. One major partnership announced in 1998 paired AMD with semiconductor giant Motorola. In the announcement, Sanders referred to the partnership as creating a "virtual gorilla" that would enable AMD to compete with Intel on fabrication capacity while
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    3 votes
    176

    HP 300

    The HP 300 "Amigo" was a computer produced by Hewlett Packard (HP) in the late 1970s based loosely on the stack-based HP 3000, but with virtual memory for both code and data. The HP300 was cut-short from being a commercial success despite the huge engineering effort, which included HP-developed and -manufactured silicon on sapphire (SOS) processor and I/O chips. The HP300 was initially designed as a single-user workstation by a totally separate program within the General Systems Division (GSD), the Cupertino, CA home of the HP 3000 business computers (the division was later renamed Computer Systems Division CSY). Later, the HP300 design team developed multi-user abilities, and an ahead of its time inter-unit processor interconnect that let one HP300 change registers in other inter-connected HP300's system. The circuit boards were in a floor pedestal box, with CRT on top with built-in soft keys, and fixed keyboard protruding in front. It pioneered such ideas as built-in networking, automatic spelling correction, multiple windows (on a character based screen), and labels adjacent to vertically stacked user function keys, now used on ATMs and gas pumps. The HP300 featured HP-IB (later
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    3 votes
    177
    Nvidia Tegra

    Nvidia Tegra

    Tegra is a system on a chip (SoC) series developed by Nvidia for mobile devices such as smartphones, personal digital assistants, and mobile Internet devices. The Tegra integrates the ARM architecture processor central processing unit (CPU), graphics processing unit (GPU), northbridge, southbridge, and memory controller onto one package. The series emphasizes low power consumption and high performance for playing audio and video. The Tegra APX 2500 was announced on February 12, 2008, the Tegra 6xx product line was revealed on June 2, 2008, and the APX 2600 was announced in February 2009. The APX chips were designed for smartphones, while the Tegra 600 and 650 chips were intended for smartbooks and mobile Internet devices (MID). The first product to use the Tegra was Microsoft's Zune HD media player in September 2009, followed by the Samsung M1. Microsoft's KIN was the first cellular phone to use the Tegra, however the phone did not have an app store, so the Tegra's power did not provide much advantage. In September 2008, Nvidia and Opera Software announced that they will produce a version of the Opera 9.5 browser optimised for the Tegra on Windows Mobile and Windows CE. At Mobile
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    3 votes
    178
    AMD Am29000

    AMD Am29000

    • Manufacturers: Advanced Micro Devices
    The AMD 29000, often simply 29k, was a popular family of 32-bit RISC microprocessors and microcontrollers developed and fabricated by Advanced Micro Devices (AMD). They were, for a time, the most popular RISC chips on the market, widely used in laser printers from a variety of manufacturers. In late 1995 AMD dropped development of the 29k because the design team was transferred to support the PC side of the business. What remained of AMD's embedded business was realigned towards the embedded 186 family of 80186 derivatives. The majority of AMD's resources were then concentrated on their high-performance, desktop x86 clones, using many of the ideas and individual parts of the latest 29k to produce the AMD K5. The 29000 evolved from the same Berkeley RISC design that also led to the Sun SPARC and Intel i960. One "trick" used in all of the Berkeley-derived designs is the concept of register windows, a technique used to speed up procedure calls significantly. The basic idea is to use a large set of registers as a stack, loading local data into a set of registers during a call, and marking them "dead" when the procedure returns. Values being returned from the routines would be placed in
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    2 votes
    179

    AMULET microprocessor

    AMULET is a series of microprocessors that implement the ARM processor architecture. Developed by the Advanced Processor Technologies group under the University of Manchester's computer science school (formerly the AMULET and PAL groups based at the same institution), AMULET is unique amongst ARM implementations in being an asynchronous microprocessor, not making use of a square wave clock signal for data synchronization and movement.
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    2 votes
    180

    Intel 8052

    • Manufacturers: Intel Corporation
    • Processor Family: Intel 8051
    The Intel 8052 was an enhanced version of the original Intel 8051 that featured 256 bytes of internal RAM instead of 128 bytes, 8 kB of ROM instead of 4 kB, and a third 16-bit timer. 
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    2 votes
    181
    Intel740

    Intel740

    The Intel740, or i740, is a graphics processing unit using an AGP interface released by Intel in 1998. Intel was hoping to use the i740 to popularize the AGP port, while most graphics vendors were still using PCI. Released with enormous fanfare, the i740 proved to have disappointing real-world performance, and sank from view after only a few months on the market. Some of its technology lived on in the Intel GMA systems that continue to be sold to this day. The i740 has a long and storied history that starts at GE Aerospace as part of their flight simulation systems, notable for their construction of the Project Apollo "Visual Docking Simulator" that was used to train Apollo to dock the Command Module and Lunar Module. GE sold their aerospace interests to Martin Marietta in 1992, a victim of Jack Welch's aggressive downsizing of GE. In 1995, Martin Marietta merged with Lockheed to form Lockheed Martin. In January 1995, Lockheed Martin re-organized their divisions and formed Real3D in order to bring their 3D experience to the civilian market. Real3D had an early brush with success, providing chipsets and overall design to Sega, who used it in a number of arcade game boards, the Model
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    2 votes
    182
    Motorola 6800

    Motorola 6800

    • Manufacturers: Motorola
    • Used In Computers: MEK6800D2
    The 6800 was an 8-bit microprocessor designed and first manufactured by Motorola in 1974. The MC6800 microprocessor was part of the M6800 Microcomputer System that also included serial and parallel interface ICs, RAM, ROM and other support chips. A significant design feature was that the M6800 family of ICs required only a single five-volt power supply at a time when most other microprocessors required three voltages. The M6800 Microcomputer System was announced in March 1974 and was in full production by the end of that year. The 6800 architecture and instruction set were influenced by the then popular Digital Equipment Corporation PDP-11 mini computer. The 6800 has a 16-bit address bus that could directly access 64 KB of memory and an 8-bit bi-directional data bus. It has 72 instructions with seven addressing modes for a total of 197 opcodes. The original MC6800 could have a clock frequency of up to 1 MHz. Later versions had a maximum clock frequency of 2 MHz. In addition to the ICs, Motorola also provided a complete assembly language development system. The customer could use the software on a remote timeshare computer or on an in-house mini-computer system. The Motorola
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    2 votes
    183
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    184

    PowerPC 604e

    • Used In Computers: ASCI Blue Pacific
    The PowerPC 604e is a 32 bit IBM RISC-based processor featured in a number of Apple Computer's Macintosh systems. They include: The 604e was also used in some IBM RS6000 Unix systems, including: The 604e was also used in one of the latest Amiga third party products of Phase5. In addition, the 604e processor was featured in clones manufactured by Akia, APS, Centralen Norrland, CentroHL, Comjet, Computer Warehouse, Daystar Digital, DynaTec, Gravis, Hardware Research, International Computer, MacTell, MacWay, MacWorks, Marathon Computer, MaxxBoxx, Motorola, Pios, Power Computing, PowerDome, PowerEx, PowerTools, RedBox, Shaye, Storm, Tatung, Umax, Vertegri, and VisionPower.
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    2 votes
    185

    AMD Lione

    AMD Lione is a line of processors based on a modified revision of AMD's K12 architecture designed specifically for UMPC's and is currently under development. Lione is AMD's response to Intel's widespreading Atom processors in the UMPC line. The processors will be built on the 32nm process technology. The processors are expected for release on the third quarter of 2009. AMD claims it to be the fastest UMPC-specific designed processor by 2010. The AMD Lione processor line are dual core processors fabricated on 45nm technology. It is planned to have support for dual channel DRR3-1333 SO-DIMM RAM and will also feature a DRAM prefetcher that was featured in AMD Turion Ultra. Clock rates are planned to range from 1.6GHz to 2.5GHz and thermal design power (TDP) will range from 20W to 28W. The AMD Lione will have all the features that were available in the AMD Turion Ultra and HyperTransport 3.0 link at 2.6GHz plus will have integrated AMD Overdrive FX application built-in its integrated RAM which will manage all cores power usage, clock speed, and cache usage. One new feature on the AMD Lione will be the integrated 512MB DDR2 PC2-5300 RAM that is integrated in the processor for storage
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    3 votes
    186

    Apple A5x

    • Used In Computers: iPad 3
    The Apple A5x or Apple A5X (processor code S5L8945X) is a supposedly upcoming microprocessor (or a prototype for an upcoming A6 processor) designed by Apple Inc. and manufactured by Samsung It will replace Apple's current microprocessor, the A5. Reportedly, the A5X will be a dual-core processor containing two cores. The A5X is expected to make its debut in the third iteration of Apple's iPad tablet in March of 2012.
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    3 votes
    187
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    188
    Intel 80386

    Intel 80386

    • Processor Family: x86-32 (32 bit Intel x86)
    The Intel 80386, also known as the i386, or just 386, was a 32-bit microprocessor introduced by Intel in 1985. The first versions had 275,000 transistors and were used as the central processing unit (CPU) of many workstations and high-end personal computers of the time. As the original implementation of the 32-bit extension of the 8086 architecture, the 80386 instruction set, programming model, and binary encodings are still the common denominator for all 32-bit x86 processors, this is termed x86, IA-32, or i386-architecture, depending on context. The 80386 could correctly execute most code intended for earlier 16-bit x86 processors such as the 8088 and 80286 that were ubiquitous in early PCs. Following the same tradition, modern 64-bit x86 processors are able to run most programs written for older chips, all the way back to the original 16-bit 8086 of 1978. Over the years, successively newer implementations of the same architecture have become several hundreds of times faster than the original 80386 (and thousands of times faster than the 8086). A 33 MHz 80386 was reportedly measured to operate at about 11.4 MIPS. The 80386 was launched in October 1985, but full-function chips
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    2 votes
    189
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    190
    OpenRISC 1200

    OpenRISC 1200

    The OpenRISC 1200 (OR1200) is a synthesizable CPU core maintained by developers at OpenCores.org. The OR1200 design is an open source implementation of the OpenRISC 1000 RISC architecture . The Verilog RTL description is released under the GNU Lesser General Public License (LGPL). The IP core of the OR1200 is implemented in the Verilog HDL. As an open source core, the design is fully public and may be downloaded and modified by any individual. The official implementation is maintained by developers at OpenCores.org. The implementation specifies a power management unit, debug unit, tick timer, programmable interrupt controller (PIC), central processing unit (CPU), and memory management hardware. Peripheral systems and a memory subsystem may be added using the processor's implementation of a standardized 32-bit Wishbone bus interface. The OR1200 is intended to have a performance comparable to an ARM10 processor architecture. The OR1200 CPU is an implementation of the 32-bit ORBIS32 instruction set architecture (ISA) and (optionally) ORFP32X ISA implementing IEEE-754 compliant single precision floating point support. The ISA has five instruction formats and supports two addressing
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    2 votes
    191

    Freescale 68EC040

    • Processor Family: 68k
    The 68EC040 is a version of the Motorola 68040 microprocessor intended for embedded controllers. It differs from the 68040 in that it has no FPU or MMU. This makes it less expensive and draw less power. Note: In keeping with general Motorola naming, this CPU is often referred to as the EC40.
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    3 votes
    192
    Motorola 68060

    Motorola 68060

    • Processor Family: 68k
    The Motorola 68060 is a 32-bit microprocessor from Motorola released in 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 680x0 family. Two derivatives were produced, the 68LC060 and the 68EC060. There is an LC (Low-Cost) version, without an FPU and EC (Embedded Controller), without MMU and FPU. The 68060 design was led by Joe Circello. The 68060 shares most architectural features with the P5 Pentium. Both have a very similar superscalar in-order dual instruction pipeline configuration, and an instruction decoder which breaks down complex instructions into simpler ones before execution. However, a significant difference is that the 68060 FPU is not pipelined and is therefore up to three times slower than the Pentium in floating point applications. In contrast to that, integer multiplications and bit shifting instructions are significantly faster on the 68060. An interesting feature of the 68060 is the ability to execute simple instructions in the address generation unit (AGU) and thereby supply the result two cycles before the ALU. Another point of interest is that large amounts of commercial compiled code were analyzed for clues as to
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    3 votes
    193

    AllWinner A1X

    • Processor Family: ARM Cortex-A8
    The Allwinner A1X, known under Linux as sunxi, is a family of SoC devices designed by AllWinner Technology Co. Ltd. from Zhuhai, China. Currently the family consists of the A13 and the A10. The SoCs incorporate the ARM Cortex-A8 as its main processor and the Mali 400 as the GPU. The Allwinner A1X is known for its ability to easily boot from an SD card GNU/Linux distributions such as Debian, Ubuntu, and other ARM architecture-capable GNU/Linux distributions. The ability is in addition to the Android OS usually installed on the Flash memory of the device. Currently the A1X family consists of two models. The A10 (sun4i) is the current full-featured SoC with all the features outlined below. The A13 (sun5i) is a lower power consumption and lower cost version of the A10 which is designed primarily for tablet computers. The A13 does not have HDMI or SATA connections. A new more powerful A1X version (sun6i - Allwinner A15?) is rumored to be forthcoming. This rumor has not been confirmed yet by Allwinner. But on July 9 cnbeta.com speculated the next SoC from AllWinner will be a quad-core Cortex-A7. Video Processing Unit Digital processing Unit Memory Connectivity Storage and boot
    6.00
    1 votes
    194
    Alpha 21064

    Alpha 21064

    • Manufacturers: Digital Equipment Corporation
    • Processor Family: DEC Alpha
    • Used In Computers: DEC 3000 AXP
    The Alpha 21064 is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha (introduced as the Alpha AXP) instruction set architecture (ISA). It was introduced as the DECchip 21064 before it was renamed in 1994. The 21064 is also known by its code name, EV4. It was announced in February 1992 with volume availability in September 1992. The 21064 was the first commercial implementation of the Alpha ISA, and the first microprocessor from Digital to be available commercially. It was succeeded by a derivative, the Alpha 21064A in October 1993. The first Alpha processor was a test chip codenamed EV3. This test chip was fabricated using Digital's 1.0-micrometre (µm) CMOS-3 process. The test chip lacked a floating point unit and only had 1 KB caches. The test chip was used to confirm the operation of the aggressive circuit design techniques. The test chip (along with simulators and emulators) was also used to bring up firmware and the various operating systems that the company supported. The production chip, codenamed EV4, was fabricated using Digital's 0.75 µm CMOS-4 process. Dirk Meyer and Edward McLellan were the micro-architects. Ed designed
    6.00
    1 votes
    195

    ARM Cortex-A9 MPCore

    • Used In Computers: PlayStation Vita
    The ARM Cortex-A9 MPCore is a 32-bit multicore processor providing up to 4 cache-coherent Cortex-A9 cores, each implementing the ARM v7 instruction set architecture. Key features of the Cortex-A9 core are: ARM states that the TSMC 40G hard macro implementation typically operating at 2 GHz; a single core (excluding caches) occupies less than 1.5 mm when designed in a TSMC 65 nanometer (nm) generic process and can be clocked at speeds over 1 GHz, consuming less than 250 mW per core. Several system on a chip (SoC) devices implement the Cortex-A9 core, including:
    6.00
    1 votes
    196

    Berkeley RISC

    Berkeley RISC was one of two seminal research projects into RISC-based microprocessor design taking place under ARPA's VLSI project. RISC was led by David Patterson (who coined the term RISC) at the University of California, Berkeley between 1980 and 1984. The other project took place only a short drive away at Stanford University under their MIPS effort starting in 1981 and running until 1984. Berkeley's project was so successful that it became the name for all similar designs to follow, even the MIPS would become known as a "RISC processor". The RISC design was later commercialized as the SPARC processor, and inspired the landmark DEC Alpha architecture. Both RISC and MIPS were developed from the realization that the vast majority of programs did not use the vast majority of a processor's instructions. In one calculation it was found that the entire Unix system, when compiled, used only 30% of the available instructions on the Motorola 68000. Much of the circuitry in the m68k, and similar designs, was dedicated to decoding these instructions which were never being used. The RISC idea was to include only those instructions that were really used, using those transistors to speed
    6.00
    1 votes
    197
    MIPS architecture

    MIPS architecture

    MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by MIPS Technologies (formerly MIPS Computer Systems, Inc.). The early MIPS architectures were 32-bit, and later versions were 64-bit. Multiple revisions of the MIPS instruction set exist, including MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPS32, and MIPS64. The current revisions are MIPS32 (for 32-bit implementations) and MIPS64 (for 64-bit implementations). MIPS32 and MIPS64 define a control register set as well as the instruction set. Several optional extensions are also available, including MIPS-3D which is a simple set of floating-point SIMD instructions dedicated to common 3D tasks, MDMX (MaDMaX) which is a more extensive integer SIMD instruction set using the 64-bit floating-point registers, MIPS16e which adds compression to the instruction stream to make programs take up less room, and MIPS MT, which adds multithreading capability. Computer architecture courses in universities and technical schools often study the MIPS architecture. The architecture greatly influenced later RISC architectures such
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    1 votes
    198
    MOS Technology 6510

    MOS Technology 6510

    • Processor Family: MOS Technology 6502
    • Used In Computers: Commodore 64
    The MOS Technology 6510 is a microprocessor designed by MOS Technology, Inc., and is a modified form of the very successful 6502. The primary change from the 6502 was the addition of an 8-bit general purpose I/O port (only six I/O pins were available in the most common version of the 6510). In addition, the address bus could be made tristate. The 6510 was only widely used in the Commodore 64 home computer (and in significantly smaller numbers in the C64's portable version, the SX-64). In both the C64 and SX-64 the extra pins of the processor were used to control the computer's memory map by bank switching, and in the C64 also for controlling three of the four signal lines of the Datassette tape recorder (the electric motor control, key-press sensing and write data lines; the read data line went to another I/O chip). It was possible, by writing the correct bit pattern to the processor at address $01, to completely expose almost the full 64KB of RAM in the C64, leaving no ROM or I/O hardware exposed except for the processor I/O port itself. In 1985 MOS produced the 8500, an HMOS version of the 6510. Other than the process change, it is virtually identical to the NMOS version of the
    6.00
    1 votes
    199
    Pentium 4

    Pentium 4

    Pentium 4 was a line of single-core desktop and laptop central processing units (CPUs), introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the P6 microarchitecture of the Pentium Pro CPUs in 1995. NetBurst differed from P6 (Pentium III, II, etc.) by featuring a very deep instruction pipeline to achieve very high clock speeds. Intel claimed that NetBurst would allow clock speeds of up to 10 GHz, however, severe problems with heat dissipation (especially with the Prescott Pentium 4) limited CPU clock speeds to a much lower 3.8 GHz. In 2004, the initial 32-bit x86 instruction set of the Pentium 4 microprocessors was extended by the 64-bit x86-64 set. The first Pentium 4 cores, codenamed Willamette, were clocked from 1.3 GHz to 2 GHz. They were released on November 20, 2000, using the Socket 423 system. Notable with the introduction of the Pentium 4 was the 400 MT/s FSB. It actually operated at 100 MHz but the FSB was quad-pumped, meaning that the maximum transfer rate was four times the base clock of the bus, so it was
    6.00
    1 votes
    200

    Teraflops Research Chip

    The Teraflops Research Chip (also called Polaris) is a research processor containing 80 cores developed by Intel Corporation's Tera-Scale Computing Research Program. The processor was officially announced February 11, 2007 and shown working at the 2007 International Solid-State Circuits Conference. Features of the processor include dual floating point engines, sleeping-core technology, self-correction, fixed-function cores, and three dimensional memory stacking. The purpose of the chip is to explore the possibilities of Tera-Scale architecture (the process of creating processors with more than four cores) and to experiment with various forms of networking and communication within the next generation of processors. The processor consists of 80 individual cores on a single chip. The cores are different from the cores used in today's main stream dual or quad core processors in that they are much simpler in design. The same parts and ideas that went into constructing today's generation of processors were used in the new processor. These parts and ideas are simply reconstructed in a fashion which defines the new tera-scale era of processor architecture and allow for more than four cores
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    1 votes
    201
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    1 votes
    202
    X86-32 (32 bit Intel x86)

    X86-32 (32 bit Intel x86)

    • Manufacturers: Intel Corporation
    • Used In Computers: Macintosh
    IA-32 (Intel Architecture, 32-bit), also known as x86-32, i386 or x86, is the CISC instruction-set architecture of Intel's most commercially successful microprocessors, and was first implemented in the Intel 80386 as a 32-bit extension of x86 architecture. This architecture has defined the instruction set for the family of microprocessors currently installed in most personal computers in the world, although it is now being supplanted by x86-64. The IA-32 instruction set was introduced in the Intel 80386 microprocessor in 1986 and remains the basis of most PC microprocessors over twenty years later. Even though the instruction set has remained intact, the successive generations of microprocessors that run it have become much faster. Within various programming language directives, IA-32 is still sometimes referred to as the "i386" architecture. Intel Corporation is the inventor and the biggest supplier of IA-32 processors. The second biggest supplier is AMD. As of 2011, both Intel and AMD have moved to x86-64, but still produce IA-32 processors such as Intel Atom (N2xx and Z5xx series) and Geode. VIA Technologies continues to produce the VIA C3/VIA C7 family of "pure" IA-32 devices.
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    1 votes
    203
    AMD K10

    AMD K10

    • Manufacturers: Advanced Micro Devices
    The AMD Family 10h, or K10, is a microprocessor microarchitecture by AMD. Though there were once reports that the K10 had been canceled, the first third-generation Opteron products for servers were launched on September 10, 2007, with the Phenom processors for desktops following and launching on November 11, 2007 as the immediate successors to the K8 series of processors (Athlon 64, Opteron, 64-bit Sempron). It is commonly perceived that from the time after the use of the codename K8 for the AMD K8 or Athlon 64 processor family, AMD no longer uses K-nomenclatures (originally stood for Kryptonite) since no K-nomenclature naming convention beyond K8 has appeared in official AMD documents and press releases after the beginning of 2005. The name "K8L" was first coined by Charlie Demerjian, one of the writers of The Inquirer back in 2005, and was used by the wider IT community as a convenient shorthand while according to AMD official documents, the processor family was termed "AMD Next Generation Processor Technology". The microarchitecture has also been referred to as Stars, as the codenames for desktop line of processors was named under stars or constellations (the initial Phenom
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    2 votes
    204
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    205

    Blackfin

    • Manufacturers: Analog Devices
    The Blackfin is a family of 16- or 32-bit microprocessors developed, manufactured and marketed by Analog Devices. The family is characterized by their built-in, fixed-point digital signal processor (DSP) functionality supplied by 16-bit Multiply–accumulates (MACs), accompanied on-chip by a small and power-efficient microcontroller. The result is a low-power, unified processor architecture that can run operating systems while simultaneously handling complex numeric tasks such as real-time H.264 video encoding. There are several hardware development kits for the Blackfin. Open-source operating systems for the Blackfin include uClinux. Blackfin processors use a 32-bit RISC microcontroller programming model on a SIMD architecture, which was co-developed by Intel and Analog Devices, as MSA (Micro Signal Architecture). The Blackfin processor architecture was announced in December, 2000 and first demonstrated at the Embedded Systems Conference in June, 2001. The Blackfin architecture incorporates aspects of ADI's older SHARC architecture and Intel's XScale architecture into a single core, combining digital signal processing (DSP) and microcontroller functionality. There are many
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    2 votes
    206

    Intel Core i3

    • Used In Computers: Lenovo Thinkpad Edge 11
    The Core i3 was intended to be the new low end of the performance processor line from Intel, following the retirement of the Core 2 brand. The first Core i3 processors were launched on January 7, 2010. The first Nehalem based Core i3 was Clarkdale-based, with an integrated GPU and two cores. The same processor is also available as Core i5 and Pentium, with slightly different configurations. The Core i3-3xxM processors are based on Arrandale, the mobile version of the Clarkdale desktop processor. They are similar to the Core i5-4xx series but running at lower clock speeds and without Turbo Boost.
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    2 votes
    207
    Intellivision

    Intellivision

    The Intellivision is a video game console released by Mattel in 1979. Development of the console began in 1978, less than a year after the introduction of its main competitor, the Atari 2600. The word intellivision is a portmanteau of "intelligent television". Over 3 million Intellivision units were sold and a total of 125 games were released for the console. In 2009, video game website IGN named the Intellivision the No. 14 greatest video game console of all time. The Intellivision was developed by Mattel Electronics, a subsidiary of Mattel formed expressly for the development of electronic games. The console was test marketed in Fresno, California, in 1979 with a total of four games available, and was released nationwide in 1980 with a price tag of US$299 and a pack-in game: Las Vegas Poker & Blackjack. Though not the first system to challenge Atari, it was the first to pose a serious threat to Atari's dominance. A series of advertisements featuring George Plimpton were produced, that demonstrated the superiority of the Intellivision's graphics and sound to those of the Atari 2600, using side-by-side game comparisons. One of the slogans of the television advertisements stated
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    2 votes
    208

    Freescale RS08

    • Manufacturers: Freescale Semiconductor
    The RS08 core is a reduced-resource version of the Freescale MC68HCS08 central processing unit (CPU), a member of the 6800 microprocessor family. It has been implemented in several microcontroller devices for embedded systems. Compared to its sibling HC08 and S08 parts, it has a much-simplified design. The 'R' in its part numbers suggests "Reduced"; Freescale itself describes the core as "ultra-low-end". Typical implementations include fewer on-board peripherals and memory resources, have smaller packages (the smallest is the QFN6 package, at 3mm x 3mm x 1mm), and are priced under US $1. Aims of the simplified design include greater efficiency, greater cost-effectiveness for small-memory-size parts, and smaller die size. The RS08 employs a von Neumann architecture with shared program and data bus; executing instructions from within data memory is possible. The device is not binary compatible with the S08 core, though the instruction opcodes and addressing modes are a subset of the S08. This allows an easy transition from the S08 core to the RS08 core for designers and engineers. Short and Tiny addressing modes allow for more efficient access and manipulation of the
    4.50
    2 votes
    209
    IPod touch

    IPod touch

    The iPod Touch (stylized, and marketed as iPod touch; also colloquially but incorrectly referred to as the iTouch, by analogy to the iPhone) is a portable media player, personal digital assistant, handheld game console, and Wi-Fi mobile device designed and marketed by Apple Inc. The iPod Touch adds the multi-touch graphical user interface to the iPod line. It is the first iPod with wireless access to the iTunes Store, and also has access to Apple's App Store, enabling content to be purchased and downloaded directly on the device. As of March 2011, Apple has sold over 60 million iPod Touch units. The iPod Touch runs iOS. The first major update after the initial release was iPhone OS 2.0. This update introduced the App Store, which allowed third-party applications for the first time. iPhone OS 2.0 debuted July 11, 2008. iPhone users received the update for free, whilst iPod Touch users had to pay for the update. The second major update to the operating system, iPhone OS 3.0, was released June 17, 2009. iPhone OS 3.0 added features such as cut, copy, and paste, data tethering and push notification support. As with the prior major release, iPhone users received the update for free,
    4.50
    2 votes
    210
    Motorola 68010

    Motorola 68010

    • Processor Family: 68k
    The Motorola MC68010 processor is a 16/32-bit microprocessor from Motorola, released in 1982. In line with the Motorola 68000 naming convention, it is usually just referred to as the 010 (pronounced oh-one-oh). It fixes several small flaws in the 68000, and adds a few features. The 68010 was pin-compatible with the 68000, but was not 100% software compatible. Some of the differences were: Additionally, the 68010 had a "loop mode", which could be considered a tiny and special-case instruction cache, which accelerates loops that consist of only 2 instructions. In practice, the overall speed gain compared to the 68000 at the same frequency was less than 10%. The 68010 could be used with the 68451 MMU. However, problems with the design, such as a 1 clock memory access penalty, made this configuration unpopular. Some vendors such as Sun Microsystems used their own MMU design. The 68010 was never as popular as the 68000, as the added complexity and cost turned out not to be worthwhile in practice. Vendors looking for MMU support waited for the 68020 instead. However, due to the 68010's small speed boost over the 68000 and its support for virtual memory it can be found in a number of
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    2 votes
    211
    PIC microcontroller

    PIC microcontroller

    • Manufacturers: Microchip Technology
    • Processor Family: PIC18 MCU
    PIC is a family of modified Harvard architecture microcontrollers made by Microchip Technology, derived from the PIC1650 originally developed by General Instrument's Microelectronics Division. The name PIC initially referred to "Peripheral Interface Controller". PICs are popular with both industrial developers and hobbyists alike due to their low cost, wide availability, large user base, extensive collection of application notes, availability of low cost or free development tools, and serial programming (and re-programming with flash memory) capability. They are also commonly used in educational programming as they often come with the easy to use 'pic logicator' software. The PIC architecture is characterized by its multiple attributes: There is no distinction between memory space and register space because the RAM serves the job of both memory and registers, and the RAM is usually just referred to as the register file or simply as the registers. PICs have a set of registers that function as general purpose RAM. Special purpose control registers for on-chip hardware resources are also mapped into the data space. The addressability of memory varies depending on device series, and
    4.50
    2 votes
    212
    Transputer

    Transputer

    • Manufacturers: INMOS
    • Used In Computers: Meiko Computing Surface
    The transputer was a pioneering microprocessor architecture of the 1980s, featuring integrated memory and serial communication links, intended for parallel computing. It was designed and produced by Inmos, a British semiconductor company based in Bristol. For some time in the late 1980s many considered the transputer to be the next great design for the future of computing. While Inmos and the transputer did not ultimately live up to this expectation, the transputer architecture was highly influential in provoking new ideas in computer architecture, several of which have re-emerged in different forms in modern systems. In the early 1980s, conventional CPUs appeared to reach a performance limit. Up to that time, manufacturing difficulties limited the amount of circuitry designers could place on a chip. Continued improvements in the fabrication process, however, removed this restriction. Soon the problem became that the chips could hold more circuitry than the designers knew how to use. Traditional CISC designs were reaching a performance plateau, and it wasn't clear it could be overcome. It seemed that the only way forward was to increase the use of parallelism, the use of several
    4.50
    2 votes
    213
    EDSAC

    EDSAC

    • Manufacturers: University of Cambridge
    Electronic Delay Storage Automatic Calculator (EDSAC) was an early British computer. The machine, having been inspired by John von Neumann's seminal First Draft of a Report on the EDVAC, was constructed by Maurice Wilkes and his team at the University of Cambridge Mathematical Laboratory in England. EDSAC was the second usefully operational electronic digital stored-program computer. Later the project was supported by J. Lyons & Co. Ltd., a British firm, who were rewarded with the first commercially applied computer, LEO I, based on the EDSAC design. EDSAC ran its first programs on 6 May 1949, when it calculated a table of squares and a list of prime numbers. As soon as EDSAC was completed, it began serving the University's research needs. None of its components were experimental. It used mercury delay lines for memory, and derated vacuum tubes for logic. Input was via five-hole punched tape and output was via a teleprinter. Initially registers were limited to an accumulator and a multiplier register. In 1953, David Wheeler, returning from a stay at the University of Illinois, designed an index register as an extension to the original EDSAC hardware. The EDSAC's memory consisted of
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    1 votes
    214
    Intel 80286

    Intel 80286

    The Intel 80286 (also called iAPX 286), introduced on 1 February 1982, was a 16-bit x86 microprocessor with 134,000 transistors. Like its contemporary simpler cousin, the 80186, it could correctly execute most software written for the earlier Intel 8086 and 8088. It was employed for the IBM PC/AT, introduced in 1984, and then widely used in most PC/AT compatible computers until the early 1990s. The 80286 is the first member of the family of advanced microprocessors with memory management and wide protection abilities. After the 6 and 8 MHz initial releases, it was subsequently scaled up to 12.5 MHz. (AMD and Harris later pushed the architecture to speeds as high as 20 MHz and 25 MHz, respectively.) On average, the 80286 had a speed of about 0.21 instructions per clock. The 6 MHz model operated at 0.9 MIPS, the 10 MHz model at 1.5 MIPS, and the 12 MHz model at 2.66 MIPS. The later E-stepping level of the 80286 was free of the several significant errata that caused problems for programmers and operating system writers in the earlier B-step and C-step CPUs (common in the AT and AT clones). The 80286 was designed for multi-user systems with multitasking applications, including
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    1 votes
    215
    Intel Core

    Intel Core

    The Intel Core microarchitecture (previously known as the Next-Generation Micro-Architecture, or NGMA) is a multi-core processor microarchitecture unveiled by Intel in Q1 2006. It is based around an updated version of the Yonah core and could be considered the latest iteration of the P6 microarchitecture, which traces its history back to the Pentium Pro introduced in 1995. The high power consumption and heat intensity of NetBurst-based processors, the resulting inability to effectively increase clock speed, and other bottlenecks such as the inefficient pipeline were the primary reasons Intel abandoned the NetBurst microarchitecture. The Core microarchitecture was designed by Israel's Intel Israel (IDC) team that previously designed the Pentium M mobile processor. The first processors that used this architecture were code-named Merom, Conroe, and Woodcrest; Merom is for mobile computing, Conroe is for desktop systems, and Woodcrest is for servers and workstations. While architecturally identical, the three processor lines differ in the socket used, bus speed, and power consumption. Mainstream Core-based processors are branded Pentium Dual-Core or Pentium and low end branded Celeron;
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    1 votes
    216
    Motorola 68EC000

    Motorola 68EC000

    • Processor Family: 68k
    The 68EC000 is a microprocessor from Motorola. It is a low-cost version of the Motorola 68000, designed for embedded controller applications. The 68EC000 can have either a 8-bit or 16-bit data bus, switchable at reset. The processors are available in a variety of speeds including 8 and 16 MHz configurations, producing 2,100 and 4,376 Dhrystones each. These processors have no floating point unit and it is difficult to implement an FPU coprocessor (MC68881/2) with one because the EC series lacks necessary coprocessor instructions. The 68EC000 was used as a controller in many audio applications, including Ensoniq musical instruments and sound cards where it was part of the MIDI synthesizer. On Ensoniq sound boards, the controller provided several advantages compared to competitors without a CPU onboard. The processor allowed the board to be configured to perform various audio tasks, such as MPU-401 MIDI synthesis or MT-32 emulation, without the use of a TSR program. This improved software compatibility, lowered CPU usage, and eliminated host system memory usage. The Motorola 68EC000 core was later used in the m68k-based DragonBall processors from Motorola/Freescale. It also was used
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    1 votes
    217
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    218
    PowerPC 970

    PowerPC 970

    • Used In Computers: iMac G5
    The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM introduced in 2002. When used in Apple Inc. machines, they were dubbed the PowerPC G5. The 970 family was created through a collaboration between IBM and Apple. The project went under the codename GP-UL or Giga Processor Ultra Light, where Giga Processor was the codename for the POWER4 from which the core was derived. When Apple introduced the Power Mac G5, they stated that this was a five year collaborative effort, with multiple future generations, but it was short-lived. Apple had to retract the promise to deliver a 3 GHz processor one year after its introduction, and IBM could never get the power consumption down far enough for these processors to fit into a portable computer. Apple only used three variants of the processor. IBM’s JS20/JS21 blade modules and some low-end workstations and System p servers are based on PowerPC 970. It is also used in some high end embedded systems like Mercury’s Momentum XSA-200. IBM is also licensing the PowerPC 970 core for use in custom applications. A common misconception is that the PowerPC 970 was the core in IBM's Xenon
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    1 votes
    219
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    220

    Four Phase Systems AL1

    • Manufacturers: Four Phase Systems
    Four-Phase Systems was a computer company, founded by Lee Boysel and others, which built one of the earliest computers using semiconductor main memory and LSI MOS logic. The company was incorporated in February 1969 and had moderate commercial success. It was acquired by Motorola in 1981. The idea behind Four-Phase Systems began when Boysel was designing MOS components at Fairchild Semiconductor in 1967. Boysel wrote a manifesto explaining how a computer could be built from a small number of MOS chips. Fairchild made Boysel head of a MOS design group, which he used to design parts satisfying the requirements of his putative computer. After doing this, Boysel left to start Four-Phase in October 1968, initially with two other engineers from his Fairchild group as well as others. Boysel was not sued by Fairchild, perhaps because of chaos caused by a change in Fairchild management at that time. When the company was incorporated in February 1969, he was joined by other engineers from the Fairchild group. Boysel arranged for chips to be fabricated by Cartesian, a wafer-processing company founded by another engineer from Fairchild. Four-Phase showed its system at the Fall Joint Computer
    4.00
    1 votes
    221

    Freescale CPU32

    • Processor Family: 68k
    The Freescale 683xx (formerly Motorola 683xx) is a family of compatible microcontrollers that use a Freescale 68000-based CPU core. The family was designed using a Hardware Description Language, making the parts synthesizable, and amenable to improved fabrication processes, such as die shrinks. There are two CPU cores used in the 683xx family: the 68EC000 and the CPU32. The instruction set of the CPU32 core is similar to the 68020 without bitfield instructions, and with a few instructions unique to the CPU32 core, such as table lookup and interpolate instructions, and a low-power stop mode. The modules of the microcontroller were designed independently and released as new CPUs could be tested. This process let the architects perform "design-ahead" so that when silicon technlogies were available, Motorola had designs ready to implement and go to market. Many of these submodules have been carried forward into the Coldfire line of processors. The microcontrollers consist of a series of modules, connected by an internal bus: Other modules available on various processors in the 683xx family are:
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    1 votes
    222
    Intel XScale

    Intel XScale

    The XScale, a microprocessor core, is Intel's and Marvell's implementation of the ARMv5 architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). Intel sold the PXA family to Marvell Technology Group in June 2006. The XScale architecture is based on the ARMv5TE ISA without the floating point instructions. XScale uses a seven-stage integer and an eight-stage memory superpipelined microarchitecture. It is the successor to the Intel StrongARM line of microprocessors and microcontrollers, which Intel acquired from DEC's Digital Semiconductor division as the side effect of a lawsuit between the two companies. Intel used the StrongARM to replace its ailing line of outdated RISC processors, the i860 and i960. All the generations of XScale are 32-bit ARMv5TE processors manufactured with a 0.18 µm or 0.13 µm (as in IXP43x parts) process and have a 32 kB data cache and a 32 kB instruction cache. First and second generation XScale cores also have a 2 kB mini-data cache. Products based on the 3rd generation XScale have up to 512 kB unified L2 cache. The XScale core is used in a number of microcontroller families manufactured by Intel and Marvell,
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    1 votes
    223
    Motorola 56000

    Motorola 56000

    The Motorola DSP56000 (aka 56K) is a family of digital signal processor (DSP) chips produced by Motorola Semiconductor (now known as Freescale Semiconductor) starting in the 1980s and is still being produced in more advanced models in the 2000s. The 56k series was quite popular for a time in a number of computers, including the NeXT, Atari Falcon (56001), and SGI Indigo workstations. Upgraded 56k versions are still used today in audio gear, radars, communications devices (like mobile phones) and various other embedded DSP applications. The 56000 was also used as the basis for the updated 96000, which was not commercially successful. The DSP56000 uses fixed-point arithmetic, with 24-bit program words and 24-bit data words. It includes two 24-bit registers, which can also be referred to as a single 48-bit register. It also includes two 56-bit accumulators, each with an 8-bit "extension" (aka headroom); otherwise, the accumulators are similar to the other 24/48-bit registers. Being a modified Harvard architecture processor, the 56k has three memory spaces+buses (and on-chip memory banks in some of the models): a program memory space/bus and two data memory space/bus. 24 bits were
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    1 votes
    224
    TMS34010

    TMS34010

    The TMS34010 was the first programmable graphics processor integrated circuit (IC). First silicon was working at Texas Instruments (TI) in Houston in December 1985, and first shipment (a development board) was to IBM's workstation facility in Kingston, New York, in January 1986. Design took place at TI facilities in Bedford, UK and Houston, Texas, U.S.A. The TMS34010 was a bit addressable, 32-bit processor, with two fifteen register files sharing a sixteenth stack pointer register. Its distinguishing characteristics from all other microprocessors up to that time included special instructions for two-dimensional graphics primitives, arbitrary variable-width data, and arithmetic operations on pixel data. It was distinguished from graphics chips that preceded it (such as the NEC µPD7220 or the Hitachi HD63484 (ACRTC - Advanced CRT Controller)) by being truly programmable, instead of being limited to executing hardwired primitives. The cache was particularly useful for code fragments that implemented complex bit-level graphics operations. The TMS34010 was supported by a full ANSI compliant C compiler, and was capable of executing any general-purpose program in addition to graphics
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    WDC 65C02

    WDC 65C02

    • Processor Family: MOS Technology 6502
    The Western Design Center WDC 65C02 microprocessor is an upgraded CMOS version of the popular NMOS-based MOS Technology 6502 8-bit CPU—the CMOS redesign being made by Bill Mensch of the Western Design Center (WDC). Over various periods of time, the 65C02 has been second-sourced by NCR, GTE, Rockwell, Synertek and Sanyo. The W65C02S is the Western Design Center's version of the 65C02 microprocessor. The "S" designation indicates that the part has a fully static core which allows the primary (Ø2) clock to be slowed down or fully stopped in either the high or low state with no loss of data. The W65C02S is a low-power general-purpose 8-bit microprocessor (8-bit registers and data bus) with a 16-bit program counter and address bus. The variable length instruction set and manually optimized core size are intended to make the W65C02S well suited for low power system-on-chip (SoC) designs. WDC makes a Verilog hardware description model available for designing the 65C02 core into ASICs and FPGAs. As is common in the semiconductor industry, the company also provides a development system, which includes a developer board, an in-circuit emulator (ICE) and a software development system. The WDC
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    Athlon 64 X2

    Athlon 64 X2

    The Athlon 64 X2 is the first dual-core desktop CPU designed by AMD. It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with another functional core on one die, and connecting both via a shared dual-channel memory controller/north bridge and additional control logic. The initial versions are based on the E-stepping model of the Athlon 64 and, depending on the model, have either 512 or 1024 KB of L2 Cache per core. The Athlon 64 X2 is capable of decoding SSE3 instructions (except those few specific to Intel's architecture). In June 2007, AMD released low-voltage variants of their low-end 65 nm Athlon 64 X2, named "Athlon X2". The Athlon X2 processors feature reduced TDP of 45 W. The name was also used for K10 based budget CPUs with two cores deactivated. The benefit of dual-core processors like the X2 is their ability to process more software threads at the same time. The ability of processors to execute multiple threads simultaneously is called thread-level parallelism (TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single-core Athlon 64 of the same speed. The need for TLP processing
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    EFM32

    The EFM32 (Energy Friendly Microcontrollers) is a family of 32-bit RISC Flash microcontrollers designed by Energy Micro AS, based on Cortex-M3 and Cortex-M0 cores from ARM Holdings. EFM32 is a mixed-signal microcontroller focusing on supporting ultra low power battery operated solutions. To run from small cell batteries, EFM32 MCUs incorporates low power peripheral technology, fast response time, low latency, and autonomous operation (i.e. the CPU does not run while the peripherals communicate). The EFM32 microcontrollers are offered in various configurations. The EFM32 microcontroller family is one of the two products of Energy Micro. The other being EFR4D Draco SoC radios. The central processing unit in EFM32 is based on either Cortex-M3 or Cortex-M0 processor core from ARM Holdings. EFM stands for Energy Friendly Microcontrollers and the number 32 indicates the 32-bit processor core. EFM32 microcontroller families are named after Gecko lizards. These chips have a logo of them, inspired by David Attenborough and the BBC camera crew that made a series on amphibians. These vertebrates consumes 10% energy of a mammal of similar size. Hence, the Gecko name is used to indicates the
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    Emotion Engine

    Emotion Engine

    • Manufacturers: Sony
    • Processor Family: MIPS architecture
    • Used In Computers: PlayStation 2
    The Emotion Engine is a CPU developed and manufactured by Sony Computer Entertainment and Toshiba for use in the Sony PlayStation 2 video game console, as well as early PlayStation 3 models sold in Japan and North America (Model Numbers CECHAxx & CECHBxx). Mass production of the Emotion Engine began in 1999. The Emotion Engine consists of eight separate "units", each performing a specific task, integrated onto the same die. These units are: a CPU core, two Vector Processing Units (VPU), a graphics interface (GIF), a 10 channel DMA unit, a memory controller, an Image Processing Unit (IPU) and an input output interface. The CPU core is tightly coupled to the first VPU, VPU0. Together, they are responsible for executing game code and high-level modeling computations. The second VPU, VPU1, is dedicated to geometry-transformations and lighting and operates independently, parallel to the CPU core, controlled by microcode. VPU0, when not utilized, can also be used for geometry-transformations. Display lists generated are sent to the GIF, which prioritizes them before dispatching them to the Graphics Synthesizer for rendering. The CPU core is a two-way superscalar in-order RISC processor.
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    Harvard architecture

    The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape (24 bits wide) and data in electro-mechanical counters. These early machines had data storage entirely contained within the central processing unit, and provided no access to the instruction storage as data. Programs needed to be loaded by an operator; the processor could not boot itself. Today, most processors implement such separate signal pathways for performance reasons but actually implement a Modified Harvard architecture, so they can support tasks such as loading a program from disk storage as data and then executing it. In a Harvard architecture, there is no need to make the two memories share characteristics. In particular, the word width, timing, implementation technology, and memory address structure can differ. In some systems, instructions can be stored in read-only memory while data memory generally requires read-write memory. In some systems, there is much more instruction memory than data memory so instruction addresses are wider
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    Intel 4004

    Intel 4004

    The Intel 4004 was a 4-bit central processing unit (CPU) released by Intel Corporation in 1971. It was the first complete CPU on one chip, and also the first commercially available microprocessor. Such a feat of integration was made possible by the use of then-new silicon gate technology allowing a higher number of transistors and a faster speed than was possible before. The first public mention of 4004 was an advertisement in the November 15, 1971 edition of Electronic News, though unconfirmed reports put the date of first delivery as early as March 1971. Packaged in a 16-pin ceramic dual in-line package, the 4004 was the first commercially available computer processor designed and manufactured by chip maker Intel, which had previously made semiconductor memory chips. The chief designers of the chip were Federico Faggin and Ted Hoff of Intel, and Masatoshi Shima of Busicom (later of ZiLOG, founded by Faggin). Federico Faggin, the sole chip designer among the engineers on the MCS-4 project, was the only one with experience in MOS random logic and circuit design. He also had the crucial knowledge of the new silicon gate process technology with self-aligned gates, which he had
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    Intel 4040

    Intel 4040

    The Intel 4040 microprocessor was the successor to the Intel 4004. It was introduced in 1974. The 4040 employed a 10 μm silicon gate enhancement load PMOS technology, was made up of 3,000 transistors and could execute approximately 60,000 instructions per second. Data Bus:4-bit Address Bus:4-bit Voltge:+15V Federico Faggin proposed the project, formulated the architecture and led the design. The detailed design was done by Tom Innes. Philippines
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    Intel 80287

    Intel 80287

    The Intel 80287 (i287) was the math coprocessor for the Intel 80286 series of microprocessors. It was used to perform floating point arithmetic operations directly in hardware and normally ran at two thirds the speed of the 286 CPU. Intel (and its competitors) later introduced an 80287XL, which was actually an 80387SX with a 287 pinout. The 80287XL contained an internal 3/2 multiplier so that motherboards which ran the coprocessor at 2/3 CPU speed could instead run the FPU at the same speed of the CPU. The 80287 and 80287XL also worked with the 80386 microprocessor, and was initially the only coprocessor available for the 80386 until the introduction of the 80387 in 1987. Finally, it was also able to work with the Cyrix Cx486SLC. However for both of these chips the 80387 was strongly preferred for performance reasons and the greater capability of the instruction set.
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    Intel 80387

    Intel 80387

    The Intel 80387 (387 or i387) was a math coprocessor for the 80386 series of microprocessors, and the first Intel coprocessor to be fully compliant with the IEEE 754 standard. Released in 1987, a full two years after the 386 chip, the i387 included much improved speed over Intel's previous 8087/80287 coprocessors, and improved the characteristics of trigonometric functions. (The 80287 limited the argument range to plus or minus 45 degrees.) Without a coprocessor, the 386 normally performed floating-point arithmetic through (slow) software routines, implemented at runtime through a software exception-handler. When a math coprocessor is paired with the 386, the coprocessor performs the floating point arithmetic in hardware, returning results much faster than an (emulated) software library call. The i387 was compatible only with the standard i386 chip, which had a 32-bit processor bus. The later cost-reduced i386SX, which had a narrower 16-bit data bus, could not interface with the i387's 32-bit bus. The i386SX required its own coprocessor, the Intel 80387SX, which was compatible with the SX's narrower 16-bit data-bus.
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    Intel 80486

    Intel 80486

    • Processor Family: x86-32 (32 bit Intel x86)
    The Intel 80486 microprocessor (alias i486 or Intel486) was a higher performance follow up on the Intel 80386. Introduced in 1989, it was the first tightly pipelined x86 design as well as the first x86 chip to use more than a million transistors, due to a large on-chip cache and an integrated floating point unit. It represents a fourth generation of binary compatible CPUs since the original 8086 of 1978. A 50 MHz 80486 executed around 40 million instructions per second on average and was able to reach 50 MIPS peak performance. The i486 was without the usual 80-prefix because of a court ruling that prohibited trademarking numbers (such as 80486). Later, with the introduction of the Pentium brand, Intel began branding its chips with words rather than numbers. The 80486 was announced at Spring Comdex in April 1989. At the announcement, Intel stated that samples would be available in the third quarter of 1989 and production quantities would ship in the fourth quarter of 1989. The first 80486-based PCs were announced in late 1989, but some advised that people wait until 1990 to purchase an 80486 PC because there were early reports of bugs and software incompatibilities. The instruction
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    Intel 80486DX2

    The Intel 80486DX2 (later rebadged i486DX2) is a CPU produced by Intel that was introduced in 1992. The i486DX2 was nearly identical to the i486DX but for the addition of clock multiplier circuitry. It was the first chip to use clock doubling, whereby the processor runs two internal logic clock cycles per external bus cycle. An i486 DX2 was thus significantly faster than an i486 DX at the same bus speed thanks to the 8K on-chip cache shadowing the slower clocked external bus. For many players of video games during the early and mid 1990s, towards the end of the MS-DOS gaming era, the i486DX2-66 was a very popular processor. Often coupled with 8 - 16 MB RAM and a VLB video card, the CPU was capable of playing every title available for several years after its release, making it a "sweet spot" in CPU performance and longevity. The introduction of 3D graphics spelled the end of the 486's reign, because of their heavy use of floating point calculations and the need for faster cache and more memory bandwidth. Developers began to target the P5 Pentium processor family almost exclusively with x86 assembly language optimizations which led to the usage of terms such as Pentium compatible
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    Intel 80486DX4

    Intel 80486DX4

    The IntelDX4 is a clock-tripled i486 microprocessor with 16 kB L1 cache. Intel named it DX4 (rather than DX3) as a consequence of litigation with AMD over trademarks. The product was officially named the IntelDX4, but OEMs continued using the i486 naming convention. Intel produced IntelDX4s with two clock speed steppings: A 75 MHz version (3× 25 MHz multiplier), and a 100 MHz version (usually 3× 33.3 MHz, but sometimes also 2× 50MHz). Both chips were released on March 1994. A version of the IntelDX4 featuring write-back cache was released in October 1994. The original write-through versions of the chip are marked with a laser embossed "&E", while the write-back enabled versions are marked "&EW". i486 OverDrive editions of the IntelDX4 had locked multipliers, and therefore can only run at 3× the external clock-speed. The 100 MHz model of the processor had an iCOMP rating of 435, whilst the 75 MHz processor had a rating of 319. The IntelDX4 was an OEM-only product, but the DX4 Overdrive could be purchased at a retail store. The IntelDX4 microprocessor is mostly pin-compatible with the 80486, but requires a lower 3.3V supply. Normal 80486 and DX2 processors use a 5V supply; plugging a
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    Intel 80486SL

    Intel 80486SL

    The Intel's i486SL is the power-saving variant of the i486DX microprocessor. The SL was designed for use in mobile computers. It was produced between November 1992 and June 1993. Clock speeds available were 20, 25 and 33 MHz. The i486SL contained all features of the i486DX. In addition, the System Management Mode (SMM) (the same mode introduced with i386SL) was included with this processor. The system management mode makes it possible to shut down the processor without losing data. To achieve this, the processor state is saved in an area of static RAM (SMRAM). In mid-1993, Intel incorporated the SMM feature and all other features in the 486SL in all its new 80486 processors and discontinued the SL series. Refer to the respective section of the list of Intel microprocessors for technical details.
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    Intel 8086

    Intel 8086

    The 8086 (also called iAPX 86) is a 16-bit microprocessor chip designed by Intel between early 1976 and mid-1978, when it was released. The 8086 gave rise to the x86 architecture of Intel's future processors. The Intel 8088, released in 1979, was a slightly modified chip with an external 8-bit data bus (allowing the use of cheaper and fewer supporting logic chips), and is notable as the processor used in the original IBM PC. In 1972, Intel launched the 8008, the first 8-bit microprocessor. It implemented an instruction set designed by Datapoint corporation with programmable CRT terminals in mind, that also proved to be fairly general purpose. The device needed several additional ICs to produce a functional computer, in part due to its small 18-pin "memory-package", which ruled out the use of a separate address bus (Intel was primarily a DRAM manufacturer at the time). Two years later, Intel launched the 8080, employing the new 40-pin DIL packages originally developed for calculator ICs to enable a separate address bus. It had an extended instruction set that was source- (not binary-) compatible with the 8008 and also included some 16-bit instructions to make programming easier. The
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    Intel 8088

    Intel 8088

    • Used In Computers: IBM PC
    The Intel 8088 microprocessor was a variant of the Intel 8086 and was introduced on July 1, 1979. It had an 8-bit external data bus instead of the 16-bit bus of the 8086. The 16-bit registers and the one megabyte address range were unchanged, however. The original IBM PC was based on the 8088. The 8088 was targeted at economical systems by allowing the use of an 8-bit data path and 8-bit support and peripheral chips; complex circuit boards were still fairly cumbersome and expensive when it was released. The prefetch queue of the 8088 was shortened to four bytes, from the 8086's six bytes, and the prefetch algorithm was slightly modified to adapt to the narrower bus. These modifications of the basic 8086 design were one of the first jobs assigned to Intel's then new design office and laboratory in Haifa, Israel. Variants of the 8088 with more than 5 MHz maximum clock frequency include the 8088-2, which was fabricated using Intel's new enhanced nMOS process called HMOS and specified for a maximum frequency of 8 MHz. Later followed the 80C88, a fully static CHMOS design, which could operate from DC to 8 MHz. There were also several other, more or less similar, variants from other
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    Intel 8253

    Intel 8253

    The Intel 8253 and 8254 are Programmable Interval Timers (PITs), which perform timing and counting functions. They were primarily designed for the Intel 8080/8085-processors, but later used in x86-systems. They (or an equivalent circuit embedded in a larger chip) are found in all IBM PC compatibles. The 8253 was used in IBM PC compatibles since their introduction in 1981. In modern times, this PIT is not included as a separate chip in an x86 PC. Rather, its functionality is included as part of the motherboard's southbridge chipset. In some modern chipsets, this change may show up as measurable timing differences in accessing a PIT using the x86 I/O address space. Reads and writes to such a PIT's registers in the I/O address space may complete much faster. Newer motherboards also include a counter through the Advanced Configuration and Power Interface (ACPI), a counter on the Local Advanced Programmable Interrupt Controller (Local APIC), and a High Precision Event Timer. The CPU itself also provides the Time Stamp Counter (TSC) facility. The timer has three counters, called channels. Each channel can be programmed to operate in one of six modes. Once programmed, the channels can
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    Intel 8259

    The Intel 8259 is a Programmable Interrupt Controller (PIC) designed for the Intel 8085 and Intel 8086 microprocessors. The initial part was 8259, a later A suffix version was upward compatible and usable with the 8086 or 8088 processor. The 8259 combines multiple interrupt input sources into a single interrupt output to the host microprocessor, extending the interrupt levels available in a system beyond the one or two levels found on the processor chip. The 8259A was the interrupt controller for the ISA bus in the original IBM PC and IBM AT. The 8259 was introduced as part of Intel's MCS 85 family in 1976. The 8259A was included in the original PC introduced in 1981 and maintained by the PC/XT when introduced in 1983. A second 8259A was added with the introduction of the PC/AT. The 8259 has coexisted with the Intel APIC Architecture since its introduction in Symmetric Multi-Processor PCs. Modern PCs have since begun to completely phase out the use of the 8259A in favor of the exclusive use of the Intel APIC Architecture. However, while not anymore a separate chip, the 8259A interface is still provided by the Southbridge chipset on modern x86 motherboards. The main signal pins on
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    Motorola 68040

    Motorola 68040

    • Processor Family: 68k
    • Used In Computers: Macintosh Quadra
    This article is based on material taken from the Free On-line Dictionary of Computing prior to 1 November 2008 and incorporated under the "relicensing" terms of the GFDL, version 1.3 or later. The Motorola 68040 is a microprocessor from Motorola, released in 1990. It is the successor to the 68030 and is followed by the 68060. There was no 68050. In keeping with general Motorola naming, the 68040 is often referred to as simply the '040 (pronounced oh-four-oh or oh-forty). In Apple Macintosh computers, the 68040 was found mainly in the Macintosh Quadra, which was named for the chip. The fastest 68040 processor was clocked at 40 MHz and it was only used in the Quadra 840AV. The more expensive models in the (short-lived) Macintosh Centris line also used the 68040, while the cheaper Quadra, Centris and Macintosh Performa used the 68LC040. The 68040 was also used in other personal computers, such as the Amiga 4000 and Amiga 4000T, as well as a number of workstations, Alpha Microsystems servers, the HP 9000/400 series, and later versions of the NeXT computer. The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit (FPU). It thus included all of the functionality
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    Omap 3530

    • Manufacturers: Texas Instruments
    • Processor Family: Texas Instruments OMAP
    • Used In Computers: Beagle Board
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    X86-64

    • Manufacturers: Advanced Micro Devices
    x86-64 is an extension of the IA-32 32-bit version of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on IA-32, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other enhancements. The original specification was created by AMD, and has been implemented by AMD, Intel, VIA, and others. It is fully backwards compatible with 16-bit and 32-bit x86 code. Because the full x86 16-bit and 32-bit instruction sets remains implemented in hardware without any intervening emulation, existing x86 executables run with no compatibility or performance penalties, although existing applications that are recoded to take advantage of new features of the processor design may see performance increases. AMD's method of extending Intel's 32-bit x86 instruction set to be a subset of its x86-64 instruction set is the same technique Intel employed to extend its 16-bit x86 instruction set to 32 bits. Prior to launch, "x86-64" and "x86_64" were used to refer to the instruction set. Upon release, AMD named it AMD64. Intel initially used the names IA-32e and EM64T
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